Add support for the IEI JUKI-511P and IEI ROCKY-512 half-size boards.

Both are very similar, thus both use the JUKI-511P target.

Linux with patches from Juergen Beisert
(http://www.linuxbios.org/pipermail/linuxbios/2007-May/020932.html)
boots and work fine (ide, usb, ethernet, serial, keyboard and sound
work normally).

Problems:
 - Filo loads a bzImage only from ide0 (ide1 doesn't work yet).
 - Video doesn't work, yet.

Signed-off-by: Nikolay Petukhov <nikolay.petukhov@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2716 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

1 files changed, 59 insertions, 0 deletions

diff --git a/src/mainboard/iei/juki-511p/auto.c b/src/mainboard/iei/juki-511p/auto.c
new file mode 100644
index 0000000000..7a628ea9b1
--- /dev/null
+++ b/src/mainboard/iei/juki-511p/auto.c
@@ -0,0 +1,59 @@
+/*
+ * This file is part of the LinuxBIOS project.
+ *
+ * Copyright (C) 2007 Nikolay Petukhov <nikolay.petukhov@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+ */
+
+#define ASSEMBLY 1
+
+#include <stdint.h>
+#include <device/pci_def.h>
+#include <arch/io.h>
+#include <device/pnp_def.h>
+#include <arch/romcc_io.h>
+#include <arch/hlt.h>
+#include "pc80/serial.c"
+#include "arch/i386/lib/console.c"
+#include "ram/ramtest.c"
+#include "superio/winbond/w83977f/w83977f_early_serial.c"
+#include "cpu/x86/bist.h"
+#include "pc80/udelay_io.c"
+
+#define SERIAL_DEV PNP_DEV(0x3f0, W83977F_SP1)
+
+#include "northbridge/amd/gx1/raminit.c"
+
+static void main(unsigned long bist)
+{
+	/* Initialize the serial console. */
+	w83977f_enable_serial(SERIAL_DEV, TTYS0_BASE);
+	uart_init();
+	console_init();
+
+	/* Halt if there was a built in self test failure. */
+	report_bist_failure(bist);
+
+	/* Disable Watchdog Timer. */
+	inb(0x043);
+	inb(0x843);
+
+	/* Initialize RAM. */
+	sdram_init();
+
+	/* Check RAM. */
+	/* ram_check(0x00000000, 640 * 1024); */
+}