diff options
| author | Stefan Reinauer <stepan@coresystems.de> | 2008-01-18 15:08:58 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2008-01-18 15:08:58 +0000 |
| commit | f8ee1806ac524bc782c93eccc59ee3c929abddb9 (patch) | |
| tree | 7daab6b3aa82476a10d38fbf68068f4a409d2ce9 /src/mainboard/iei/juki-511p | |
| parent | 7e61e45402aba2b90997f4f02ca8266cf65a229a (diff) | |
| download | coreboot-f8ee1806ac524bc782c93eccc59ee3c929abddb9.tar.xz | |
Rename almost all occurences of LinuxBIOS to coreboot.
Due to the automatic nature of this update, I am self-acking. It worked in
abuild.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3053 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/iei/juki-511p')
| -rw-r--r-- | src/mainboard/iei/juki-511p/Config.lb | 12 | ||||
| -rw-r--r-- | src/mainboard/iei/juki-511p/Options.lb | 8 |
2 files changed, 10 insertions, 10 deletions
diff --git a/src/mainboard/iei/juki-511p/Config.lb b/src/mainboard/iei/juki-511p/Config.lb index 53b1982fd1..aac495186d 100644 --- a/src/mainboard/iei/juki-511p/Config.lb +++ b/src/mainboard/iei/juki-511p/Config.lb @@ -1,6 +1,6 @@ ## ## Compute the location and size of where this firmware image -## (linuxBIOS plus bootloader) will live in the boot rom chip. +## (coreboot plus bootloader) will live in the boot rom chip. ## default ROM_SIZE = 256 * 1024 default ROM_SECTION_SIZE = ROM_SIZE @@ -8,18 +8,18 @@ default ROM_SECTION_OFFSET = 0 ## ## Compute the start location and size size of -## The linuxBIOS bootloader. +## The coreboot bootloader. ## default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) ## -## Compute where this copy of linuxBIOS will start in the boot rom +## Compute where this copy of coreboot will start in the boot rom ## default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE ) ## -## Compute a range of ROM that can cached to speed up linuxBIOS, +## Compute a range of ROM that can cached to speed up coreboot, ## execution speed. ## ## XIP_ROM_SIZE must be a power of 2. @@ -66,7 +66,7 @@ makerule ./auto.inc end ## -## Build our 16 bit and 32 bit linuxBIOS entry code +## Build our 16 bit and 32 bit coreboot entry code ## mainboardinit cpu/x86/16bit/entry16.inc mainboardinit cpu/x86/32bit/entry32.inc @@ -74,7 +74,7 @@ ldscript /cpu/x86/16bit/entry16.lds ldscript /cpu/x86/32bit/entry32.lds ## -## Build our reset vector (This is where linuxBIOS is entered) +## Build our reset vector (This is where coreboot is entered) ## mainboardinit cpu/x86/16bit/reset16.inc ldscript /cpu/x86/16bit/reset16.lds diff --git a/src/mainboard/iei/juki-511p/Options.lb b/src/mainboard/iei/juki-511p/Options.lb index e2185a2604..cd5be9cad3 100644 --- a/src/mainboard/iei/juki-511p/Options.lb +++ b/src/mainboard/iei/juki-511p/Options.lb @@ -15,7 +15,7 @@ uses IRQ_SLOT_COUNT uses MAINBOARD uses MAINBOARD_VENDOR uses MAINBOARD_PART_NUMBER -uses LINUXBIOS_EXTRA_VERSION +uses COREBOOT_EXTRA_VERSION uses ARCH uses FALLBACK_SIZE uses STACK_SIZE @@ -62,7 +62,7 @@ default HAVE_FALLBACK_BOOT=1 default HAVE_MP_TABLE=0 ## -## Build code to reset the motherboard from linuxBIOS +## Build code to reset the motherboard from coreboot ## default HAVE_HARD_RESET=0 @@ -80,10 +80,10 @@ default IRQ_SLOT_COUNT=2 default HAVE_OPTION_TABLE=0 ### -### LinuxBIOS layout values +### coreboot layout values ### -## ROM_IMAGE_SIZE is the amount of space to allow linuxBIOS to occupy. +## ROM_IMAGE_SIZE is the amount of space to allow coreboot to occupy. default ROM_IMAGE_SIZE = 65536 default FALLBACK_SIZE = 131072 |