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authorStefan Reinauer <stepan@coresystems.de>2009-06-30 15:17:49 +0000
committerStefan Reinauer <stepan@openbios.org>2009-06-30 15:17:49 +0000
commit0867062412dd4bfe5a556e5f3fd85ba5b682d79b (patch)
tree81ca5db12b8567b48daaa23a541bfb8a5dc011f8 /src/mainboard/iei/pcisa-lx-800-r10
parent9702b6bf7ec5a4fb16934f1cf2724480e2460c89 (diff)
downloadcoreboot-0867062412dd4bfe5a556e5f3fd85ba5b682d79b.tar.xz
This patch unifies the use of config options in v2 to all start with CONFIG_
It's basically done with the following script and some manual fixup: VARS=`grep ^define src/config/Options.lb | cut -f2 -d\ | grep -v ^CONFIG | grep -v ^COREBOOT |grep -v ^CC` for VAR in $VARS; do find . -name .svn -prune -o -type f -exec perl -pi -e "s/(^|[^0-9a-zA-Z_]+)$VAR($|[^0-9a-zA-Z_]+)/\1CONFIG_$VAR\2/g" {} \; done Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4381 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/iei/pcisa-lx-800-r10')
-rw-r--r--src/mainboard/iei/pcisa-lx-800-r10/Config.lb16
-rw-r--r--src/mainboard/iei/pcisa-lx-800-r10/Options.lb128
-rw-r--r--src/mainboard/iei/pcisa-lx-800-r10/cache_as_ram_auto.c2
-rw-r--r--src/mainboard/iei/pcisa-lx-800-r10/irq_tables.c2
4 files changed, 74 insertions, 74 deletions
diff --git a/src/mainboard/iei/pcisa-lx-800-r10/Config.lb b/src/mainboard/iei/pcisa-lx-800-r10/Config.lb
index 515ffd0246..e4ebbcb170 100644
--- a/src/mainboard/iei/pcisa-lx-800-r10/Config.lb
+++ b/src/mainboard/iei/pcisa-lx-800-r10/Config.lb
@@ -18,20 +18,20 @@
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
-## XIP_ROM_SIZE must be a power of 2.
-default XIP_ROM_SIZE = 64 * 1024
+## CONFIG_XIP_ROM_SIZE must be a power of 2.
+default CONFIG_XIP_ROM_SIZE = 64 * 1024
include /config/nofailovercalculation.lb
arch i386 end
driver mainboard.o
-if HAVE_PIRQ_TABLE
+if CONFIG_HAVE_PIRQ_TABLE
object irq_tables.o
end
# Compile cache_as_ram.c to auto.inc.
makerule ./cache_as_ram_auto.inc
- # depends "$(MAINBOARD)/cache_as_ram_auto.c option_table.h"
- depends "$(MAINBOARD)/cache_as_ram_auto.c"
- action "$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(TOP)/src -I. -c -S $(MAINBOARD)/cache_as_ram_auto.c -o $@"
+ # depends "$(CONFIG_MAINBOARD)/cache_as_ram_auto.c option_table.h"
+ depends "$(CONFIG_MAINBOARD)/cache_as_ram_auto.c"
+ action "$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(TOP)/src -I. -c -S $(CONFIG_MAINBOARD)/cache_as_ram_auto.c -o $@"
action "perl -e 's/\.rodata/.rom.data/g' -pi $@"
action "perl -e 's/\.text/.section .rom.text/g' -pi $@"
end
@@ -39,7 +39,7 @@ mainboardinit cpu/x86/16bit/entry16.inc
mainboardinit cpu/x86/32bit/entry32.inc
ldscript /cpu/x86/16bit/entry16.lds
ldscript /cpu/x86/32bit/entry32.lds
-if USE_FALLBACK_IMAGE
+if CONFIG_USE_FALLBACK_IMAGE
mainboardinit cpu/x86/16bit/reset16.inc
ldscript /cpu/x86/16bit/reset16.lds
else
@@ -48,7 +48,7 @@ else
end
mainboardinit arch/i386/lib/id.inc
ldscript /arch/i386/lib/id.lds
-if USE_FALLBACK_IMAGE
+if CONFIG_USE_FALLBACK_IMAGE
ldscript /arch/i386/lib/failover.lds
# mainboardinit ./failover.inc
end
diff --git a/src/mainboard/iei/pcisa-lx-800-r10/Options.lb b/src/mainboard/iei/pcisa-lx-800-r10/Options.lb
index a3034b0a45..8da41c1b04 100644
--- a/src/mainboard/iei/pcisa-lx-800-r10/Options.lb
+++ b/src/mainboard/iei/pcisa-lx-800-r10/Options.lb
@@ -18,93 +18,93 @@
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
-uses HAVE_MP_TABLE
+uses CONFIG_HAVE_MP_TABLE
uses CONFIG_CBFS
-uses HAVE_PIRQ_TABLE
-uses USE_FALLBACK_IMAGE
-uses HAVE_FALLBACK_BOOT
-uses HAVE_HARD_RESET
-uses HAVE_OPTION_TABLE
-uses USE_OPTION_TABLE
+uses CONFIG_HAVE_PIRQ_TABLE
+uses CONFIG_USE_FALLBACK_IMAGE
+uses CONFIG_HAVE_FALLBACK_BOOT
+uses CONFIG_HAVE_HARD_RESET
+uses CONFIG_HAVE_OPTION_TABLE
+uses CONFIG_USE_OPTION_TABLE
uses CONFIG_ROM_PAYLOAD
-uses IRQ_SLOT_COUNT
-uses MAINBOARD
-uses MAINBOARD_VENDOR
-uses MAINBOARD_PART_NUMBER
+uses CONFIG_IRQ_SLOT_COUNT
+uses CONFIG_MAINBOARD
+uses CONFIG_MAINBOARD_VENDOR
+uses CONFIG_MAINBOARD_PART_NUMBER
uses COREBOOT_EXTRA_VERSION
-uses ARCH
-uses FALLBACK_SIZE
-uses STACK_SIZE
-uses HEAP_SIZE
-uses ROM_SIZE
-uses ROM_SECTION_SIZE
-uses ROM_IMAGE_SIZE
-uses ROM_SECTION_SIZE
-uses ROM_SECTION_OFFSET
+uses CONFIG_ARCH
+uses CONFIG_FALLBACK_SIZE
+uses CONFIG_STACK_SIZE
+uses CONFIG_HEAP_SIZE
+uses CONFIG_ROM_SIZE
+uses CONFIG_ROM_SECTION_SIZE
+uses CONFIG_ROM_IMAGE_SIZE
+uses CONFIG_ROM_SECTION_SIZE
+uses CONFIG_ROM_SECTION_OFFSET
uses CONFIG_ROM_PAYLOAD_START
uses CONFIG_COMPRESS
uses CONFIG_COMPRESSED_PAYLOAD_NRV2B
uses CONFIG_COMPRESSED_PAYLOAD_LZMA
uses CONFIG_PRECOMPRESSED_PAYLOAD
-uses PAYLOAD_SIZE
-uses _ROMBASE
-uses _RAMBASE
-uses XIP_ROM_SIZE
-uses XIP_ROM_BASE
-uses HAVE_MP_TABLE
-uses CROSS_COMPILE
+uses CONFIG_PAYLOAD_SIZE
+uses CONFIG_ROMBASE
+uses CONFIG_RAMBASE
+uses CONFIG_XIP_ROM_SIZE
+uses CONFIG_XIP_ROM_BASE
+uses CONFIG_HAVE_MP_TABLE
+uses CONFIG_CROSS_COMPILE
uses CC
-uses HOSTCC
-uses OBJCOPY
-uses DEFAULT_CONSOLE_LOGLEVEL
-uses MAXIMUM_CONSOLE_LOGLEVEL
+uses CONFIG_HOSTCC
+uses CONFIG_OBJCOPY
+uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL
+uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL
uses CONFIG_CONSOLE_SERIAL8250
-uses TTYS0_BAUD
-uses TTYS0_BASE
-uses TTYS0_LCS
+uses CONFIG_TTYS0_BAUD
+uses CONFIG_TTYS0_BASE
+uses CONFIG_TTYS0_LCS
uses CONFIG_UDELAY_IO
uses CONFIG_CONSOLE_VGA
uses CONFIG_PCI_ROM_RUN
uses CONFIG_VIDEO_MB
-uses USE_DCACHE_RAM
-uses DCACHE_RAM_BASE
-uses DCACHE_RAM_SIZE
+uses CONFIG_USE_DCACHE_RAM
+uses CONFIG_DCACHE_RAM_BASE
+uses CONFIG_DCACHE_RAM_SIZE
uses CONFIG_USE_PRINTK_IN_CAR
-uses PIRQ_ROUTE
+uses CONFIG_PIRQ_ROUTE
-default ROM_SIZE = 256 * 1024
+default CONFIG_ROM_SIZE = 256 * 1024
default CONFIG_CONSOLE_VGA = 0
default CONFIG_VIDEO_MB = 8
default CONFIG_PCI_ROM_RUN = 0
-default HAVE_FALLBACK_BOOT = 1
-default HAVE_MP_TABLE = 0
-default HAVE_HARD_RESET = 0
+default CONFIG_HAVE_FALLBACK_BOOT = 1
+default CONFIG_HAVE_MP_TABLE = 0
+default CONFIG_HAVE_HARD_RESET = 0
default CONFIG_UDELAY_IO = 1
-default HAVE_PIRQ_TABLE = 1
-default IRQ_SLOT_COUNT = 9
-default PIRQ_ROUTE = 1
-default HAVE_OPTION_TABLE = 0
-default ROM_IMAGE_SIZE = 64 * 1024
-default FALLBACK_SIZE = 128 * 1024
-default USE_DCACHE_RAM = 1
-default DCACHE_RAM_BASE = 0xc8000
-default DCACHE_RAM_SIZE = 32 * 1024
+default CONFIG_HAVE_PIRQ_TABLE = 1
+default CONFIG_IRQ_SLOT_COUNT = 9
+default CONFIG_PIRQ_ROUTE = 1
+default CONFIG_HAVE_OPTION_TABLE = 0
+default CONFIG_ROM_IMAGE_SIZE = 64 * 1024
+default CONFIG_FALLBACK_SIZE = 128 * 1024
+default CONFIG_USE_DCACHE_RAM = 1
+default CONFIG_DCACHE_RAM_BASE = 0xc8000
+default CONFIG_DCACHE_RAM_SIZE = 32 * 1024
default CONFIG_USE_PRINTK_IN_CAR=1
-default STACK_SIZE = 8 * 1024
-default HEAP_SIZE = 16 * 1024
-# default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE
-default USE_OPTION_TABLE = 0
-default _RAMBASE = 0x00004000
+default CONFIG_STACK_SIZE = 8 * 1024
+default CONFIG_HEAP_SIZE = 16 * 1024
+# default CONFIG_USE_OPTION_TABLE = !CONFIG_USE_FALLBACK_IMAGE
+default CONFIG_USE_OPTION_TABLE = 0
+default CONFIG_RAMBASE = 0x00004000
default CONFIG_ROM_PAYLOAD = 1
-default CROSS_COMPILE = ""
-default CC = "$(CROSS_COMPILE)gcc -m32"
-default HOSTCC = "gcc"
+default CONFIG_CROSS_COMPILE = ""
+default CC = "$(CONFIG_CROSS_COMPILE)gcc -m32"
+default CONFIG_HOSTCC = "gcc"
default CONFIG_CONSOLE_SERIAL8250 = 1
-default TTYS0_BAUD = 115200
-default TTYS0_BASE = 0x3f8
-default TTYS0_LCS = 0x3
-default DEFAULT_CONSOLE_LOGLEVEL=8
-default MAXIMUM_CONSOLE_LOGLEVEL=8
+default CONFIG_TTYS0_BAUD = 115200
+default CONFIG_TTYS0_BASE = 0x3f8
+default CONFIG_TTYS0_LCS = 0x3
+default CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8
+default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8
#
diff --git a/src/mainboard/iei/pcisa-lx-800-r10/cache_as_ram_auto.c b/src/mainboard/iei/pcisa-lx-800-r10/cache_as_ram_auto.c
index 23a740aeb4..cccb4a7509 100644
--- a/src/mainboard/iei/pcisa-lx-800-r10/cache_as_ram_auto.c
+++ b/src/mainboard/iei/pcisa-lx-800-r10/cache_as_ram_auto.c
@@ -118,7 +118,7 @@ void cache_as_ram_main(void)
/* Note: must do this AFTER the early_setup! It is counting on some
* early MSR setup for CS5536.
*/
- w83627hf_enable_serial(SERIAL_DEV, TTYS0_BASE);
+ w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
mb_gpio_init();
uart_init();
console_init();
diff --git a/src/mainboard/iei/pcisa-lx-800-r10/irq_tables.c b/src/mainboard/iei/pcisa-lx-800-r10/irq_tables.c
index affbfc6790..6f6d38b865 100644
--- a/src/mainboard/iei/pcisa-lx-800-r10/irq_tables.c
+++ b/src/mainboard/iei/pcisa-lx-800-r10/irq_tables.c
@@ -47,7 +47,7 @@
const struct irq_routing_table intel_irq_routing_table = {
PIRQ_SIGNATURE, /* u32 signature */
PIRQ_VERSION, /* u16 version */
- 32 + 16 * IRQ_SLOT_COUNT,/* there can be total 6 devices on the bus */
+ 32 + 16 * CONFIG_IRQ_SLOT_COUNT,/* there can be total 6 devices on the bus */
0x00, /* Where the interrupt router lies (bus) */
(0x0F << 3) | 0x0, /* Where the interrupt router lies (dev) */
EXCLUSIVE_PCI_IRQS, /* IRQs devoted exclusively to PCI usage */