diff options
author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2018-06-04 06:49:00 +0300 |
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committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2018-06-05 12:44:12 +0000 |
commit | 64aa881263fa3fdec827a3f7adf04b138ab82ff1 (patch) | |
tree | f23ae6c0868089cc443d12cec2618f471c0efe77 /src/mainboard/iei/pcisa-lx-800-r10 | |
parent | 88af0f38eb19f956e8df2b62254c10c7603a9a33 (diff) | |
download | coreboot-64aa881263fa3fdec827a3f7adf04b138ab82ff1.tar.xz |
amd/geode_lx: Remove most boards
There is active work to convert remaining two boards,
PC Engines alix1c and alix2d, to EARLY_CBMEM_INIT.
Change-Id: I87e3963af7ef719e9fa2a8b0df34a896265905f0
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/26824
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/iei/pcisa-lx-800-r10')
-rw-r--r-- | src/mainboard/iei/pcisa-lx-800-r10/Kconfig | 32 | ||||
-rw-r--r-- | src/mainboard/iei/pcisa-lx-800-r10/Kconfig.name | 2 | ||||
-rw-r--r-- | src/mainboard/iei/pcisa-lx-800-r10/board_info.txt | 2 | ||||
-rw-r--r-- | src/mainboard/iei/pcisa-lx-800-r10/devicetree.cb | 75 | ||||
-rw-r--r-- | src/mainboard/iei/pcisa-lx-800-r10/irq_tables.c | 292 | ||||
-rw-r--r-- | src/mainboard/iei/pcisa-lx-800-r10/romstage.c | 73 |
6 files changed, 0 insertions, 476 deletions
diff --git a/src/mainboard/iei/pcisa-lx-800-r10/Kconfig b/src/mainboard/iei/pcisa-lx-800-r10/Kconfig deleted file mode 100644 index 74a3c102de..0000000000 --- a/src/mainboard/iei/pcisa-lx-800-r10/Kconfig +++ /dev/null @@ -1,32 +0,0 @@ -if BOARD_IEI_PCISA_LX_800_R10 - -config BOARD_SPECIFIC_OPTIONS # dummy - def_bool y - select CPU_AMD_GEODE_LX - select NORTHBRIDGE_AMD_LX - select SOUTHBRIDGE_AMD_CS5536 - select SUPERIO_WINBOND_W83627HF - select HAVE_PIRQ_TABLE - select PIRQ_ROUTE - select BOARD_ROMSIZE_KB_256 - select POWER_BUTTON_FORCE_ENABLE - select PLL_MANUAL_CONFIG - select CORE_GLIU_500_266 - -config MAINBOARD_DIR - string - default iei/pcisa-lx-800-r10 - -config MAINBOARD_PART_NUMBER - string - default "PCISA-LX-800-R10" - -config IRQ_SLOT_COUNT - int - default 9 - -config PLLMSRlo - hex - default 0x00DE6000 - -endif # BOARD_IEI_PCISA_LX_800_R10 diff --git a/src/mainboard/iei/pcisa-lx-800-r10/Kconfig.name b/src/mainboard/iei/pcisa-lx-800-r10/Kconfig.name deleted file mode 100644 index 84d2f492d3..0000000000 --- a/src/mainboard/iei/pcisa-lx-800-r10/Kconfig.name +++ /dev/null @@ -1,2 +0,0 @@ -config BOARD_IEI_PCISA_LX_800_R10 - bool "PCISA LX-800-R10" diff --git a/src/mainboard/iei/pcisa-lx-800-r10/board_info.txt b/src/mainboard/iei/pcisa-lx-800-r10/board_info.txt deleted file mode 100644 index b5a9773a84..0000000000 --- a/src/mainboard/iei/pcisa-lx-800-r10/board_info.txt +++ /dev/null @@ -1,2 +0,0 @@ -Category: half -Board URL: http://www.ieiworld.com/en/product_IPC.asp?model=PCISA-LX diff --git a/src/mainboard/iei/pcisa-lx-800-r10/devicetree.cb b/src/mainboard/iei/pcisa-lx-800-r10/devicetree.cb deleted file mode 100644 index 99851b8fd7..0000000000 --- a/src/mainboard/iei/pcisa-lx-800-r10/devicetree.cb +++ /dev/null @@ -1,75 +0,0 @@ -chip northbridge/amd/lx - device domain 0 on - device pci 1.0 on end # Northbridge - device pci 1.1 on end # Graphics - chip southbridge/amd/cs5536 - # IRQ 12 and 1 unmasked, Keyboard and Mouse IRQs. OK - # SIRQ Mode = Active(Quiet) mode. Save power.... - # Invert mask = IRQ 12 and 1 are active high. Keyboard and Mouse, UARTs, etc IRQs. OK - register "lpc_serirq_enable" = "0x0000105a" - register "lpc_serirq_polarity" = "0x0000EFA5" - register "lpc_serirq_mode" = "1" - register "enable_gpio_int_route" = "0x0D0C0700" - register "enable_ide_nand_flash" = "0" # 0:ide mode, 1:flash - register "enable_USBP4_device" = "1" # 0: host, 1:device - register "enable_USBP4_overcurrent" = "0" #0:off, xxxx:overcurrent setting CS5536 Data Book (pages 380-381) - register "com1_enable" = "0" - register "com1_address" = "0x3F8" - register "com1_irq" = "4" - register "com2_enable" = "0" - register "com2_address" = "0x2F8" - register "com2_irq" = "3" - register "unwanted_vpci[0]" = "0" # End of list has a zero - device pci 9.0 on end # Slot1 - device pci a.0 on end # Slot2 - device pci b.0 on end # Slot3 - device pci c.0 on end # Slot4 - device pci e.0 on end # Ethernet 0 - device pci 10.0 on end # Ethernet 1 - device pci 11.0 on end # SATA - device pci f.0 on # ISA Bridge - chip superio/winbond/w83627hf - device pnp 2e.0 off # Floppy - io 0x60 = 0x3f0 - irq 0x70 = 6 - drq 0x74 = 2 - end - device pnp 2e.1 off # Parallel port - io 0x60 = 0x378 - irq 0x70 = 7 - end - device pnp 2e.2 on # Com1 - io 0x60 = 0x3f8 - irq 0x70 = 4 - end - device pnp 2e.3 on # Com2 - io 0x60 = 0x2f8 - irq 0x70 = 3 - end - device pnp 2e.5 on # Keyboard - io 0x60 = 0x60 - io 0x62 = 0x64 - irq 0x70 = 1 - irq 0x72 = 12 - end - device pnp 2e.6 off end # CIR - device pnp 2e.7 off end # GAME_MIDI_GIPO1 - device pnp 2e.8 off end # GPIO2 - device pnp 2e.9 off end # GPIO3 - device pnp 2e.a off end # ACPI - device pnp 2e.b off end # HW Monitor - end - end - device pci f.2 on end # IDE Controller - device pci f.3 on end # Audio - device pci f.4 on end # OHCI - device pci f.5 on end # EHCI - end - end - # APIC cluster is late CPU init. - device cpu_cluster 0 on - chip cpu/amd/geode_lx - device lapic 0 on end - end - end -end diff --git a/src/mainboard/iei/pcisa-lx-800-r10/irq_tables.c b/src/mainboard/iei/pcisa-lx-800-r10/irq_tables.c deleted file mode 100644 index 69dd16d8a2..0000000000 --- a/src/mainboard/iei/pcisa-lx-800-r10/irq_tables.c +++ /dev/null @@ -1,292 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007 Nikolay Petukhov <nikolay.petukhov@gmail.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <arch/pirq_routing.h> -// #include <console/console.h> -#include <arch/io.h> - -/* Platform IRQs */ -#define PIRQA 11 -#define PIRQB 10 -#define PIRQC 11 -#define PIRQD 5 - -/* Link */ -#define LINK_PIRQA 1 -#define LINK_PIRQB 2 -#define LINK_PIRQC 3 -#define LINK_PIRQD 4 -#define LINK_NONE 0 - -/* Map */ -#define IRQ_BITMAP_LINKA (1 << PIRQA) -#define IRQ_BITMAP_LINKB (1 << PIRQB) -#define IRQ_BITMAP_LINKC (1 << PIRQC) -#define IRQ_BITMAP_LINKD (1 << PIRQD) -#define IRQ_BITMAP_NOLINK 0x0 - -#define EXCLUSIVE_PCI_IRQS (IRQ_BITMAP_LINKA | IRQ_BITMAP_LINKB | IRQ_BITMAP_LINKC | IRQ_BITMAP_LINKD) - -static const struct irq_routing_table intel_irq_routing_table = { - PIRQ_SIGNATURE, /* u32 signature */ - PIRQ_VERSION, /* u16 version */ - 32 + 16 * CONFIG_IRQ_SLOT_COUNT,/* there can be total CONFIG_IRQ_SLOT_COUNT devices on the bus */ - 0x00, /* Where the interrupt router lies (bus) */ - (0x0F << 3) | 0x0, /* Where the interrupt router lies (dev) */ - EXCLUSIVE_PCI_IRQS, /* IRQs devoted exclusively to PCI usage */ - 0x1078, /* Vendor */ - 0x0002, /* Device */ - 0, /* Miniport data */ - {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, /* u8 rfu[11] */ - 0x62, /* u8 checksum , this has to set to some value that would give 0 after the sum of all bytes for this structure (including checksum) */ - - .slots = { - [0] = { - .slot = 0x0, /* means also "on board" */ - .bus = 0x00, - .devfn = (0x01 << 3)|0x0, /* 0x01 is CS5536 */ - .irq = { - [0] = { /* <-- 0 means this is INTA# output from the device or slot */ - .link = LINK_PIRQA, - .bitmap = IRQ_BITMAP_LINKA - }, - [1] = { /* <-- 1 means this is INTB# output from the device or slot */ - .link = LINK_NONE, - .bitmap = IRQ_BITMAP_NOLINK - }, - [2] = { /* <-- 2 means this is INTC# output from the device or slot */ - .link = LINK_NONE, - .bitmap = IRQ_BITMAP_NOLINK - }, - [3] = { /* <-- 3 means this is INTD# output from the device or slot */ - .link = LINK_NONE, - .bitmap = IRQ_BITMAP_NOLINK - } - } - }, - - [1] = { - .slot = 0x0, /* means also "on board" */ - .bus = 0x00, - .devfn = (0x0f << 3)|0x0, /* 0x0f is CS5536 (USB, AUDIO) */ - .irq = { - [0] = { /* <-- 0 means this is INTA# output from the device or slot */ - .link = LINK_NONE, - .bitmap = IRQ_BITMAP_NOLINK - }, - [1] = { /* <-- 1 means this is INTB# output from the device or slot */ - .link = LINK_PIRQB, /* Audio */ - .bitmap = IRQ_BITMAP_LINKB - }, - [2] = { /* <-- 2 means this is INTC# output from the device or slot */ - .link = LINK_NONE, - .bitmap = IRQ_BITMAP_NOLINK - }, - [3] = { /* <-- 3 means this is INTD# output from the device or slot */ - .link = LINK_PIRQD, /* USB */ - .bitmap = IRQ_BITMAP_LINKD - } - } - }, - - [2] = { - .slot = 0x0, /* means also "on board" */ - .bus = 0x00, - .devfn = (0x0e << 3)|0x0, /* 0x0e is eth0 */ - .irq = { - [0] = { /* <-- 0 means this is INTA# output from the device or slot */ - .link = LINK_PIRQD, - .bitmap = IRQ_BITMAP_LINKD - }, - [1] = { /* <-- 1 means this is INTB# output from the device or slot */ - .link = LINK_NONE, - .bitmap = IRQ_BITMAP_NOLINK - }, - [2] = { /* <-- 2 means this is INTC# output from the device or slot */ - .link = LINK_NONE, - .bitmap = IRQ_BITMAP_NOLINK - }, - [3] = { /* <-- 3 means this is INTD# output from the device or slot */ - .link = LINK_NONE, - .bitmap = IRQ_BITMAP_NOLINK - } - } - }, - - [3] = { - .slot = 0x0, /* means also "on board" */ - .bus = 0x00, - .devfn = (0x10 << 3)|0x0, /* 0x10 is eth1 */ - .irq = { - [0] = { /* <-- 0 means this is INTA# output from the device or slot */ - .link = LINK_PIRQB, - .bitmap = IRQ_BITMAP_LINKB - }, - [1] = { /* <-- 1 means this is INTB# output from the device or slot */ - .link = LINK_NONE, - .bitmap = IRQ_BITMAP_NOLINK - }, - [2] = { /* <-- 2 means this is INTC# output from the device or slot */ - .link = LINK_NONE, - .bitmap = IRQ_BITMAP_NOLINK - }, - [3] = { /* <-- 3 means this is INTD# output from the device or slot */ - .link = LINK_NONE, - .bitmap = IRQ_BITMAP_NOLINK - } - } - }, - - [4] = { - .slot = 0x0, /* means also "on board" */ - .bus = 0x00, - .devfn = (0x11 << 3)|0x0, /* 0x11 is SATA */ - .irq = { - [0] = { /* <-- 0 means this is INTA# output from the device or slot */ - .link = LINK_PIRQA, - .bitmap = IRQ_BITMAP_LINKA - }, - [1] = { /* <-- 1 means this is INTB# output from the device or slot */ - .link = LINK_NONE, - .bitmap = IRQ_BITMAP_NOLINK - }, - [2] = { /* <-- 2 means this is INTC# output from the device or slot */ - .link = LINK_NONE, - .bitmap = IRQ_BITMAP_NOLINK - }, - [3] = { /* <-- 3 means this is INTD# output from the device or slot */ - .link = LINK_NONE, - .bitmap = IRQ_BITMAP_NOLINK - } - } - }, - -/* - * ################### backplane ################### - */ - -/* - * PCI1 - */ - [5] = { - .slot = 0x1, /* This is real PCI slot. */ - .bus = 0x00, - .devfn = (0x09 << 3)|0x0, /* 0x09 is PCI1 */ - .irq = { - [0] = { /* <-- 0 means this is INTA# output from the device or slot */ - .link = LINK_PIRQA, - .bitmap = IRQ_BITMAP_LINKA - }, - [1] = { /* <-- 1 means this is INTB# output from the device or slot */ - .link = LINK_PIRQB, - .bitmap = IRQ_BITMAP_LINKB - }, - [2] = { /* <-- 2 means this is INTC# output from the device or slot */ - .link = LINK_PIRQC, - .bitmap = IRQ_BITMAP_LINKC - }, - [3] = { /* <-- 3 means this is INTD# output from the device or slot */ - .link = LINK_PIRQD, - .bitmap = IRQ_BITMAP_LINKD - } - } - }, -/* - * PCI2 - */ - [6] = { - .slot = 0x2, /* This is real PCI slot. */ - .bus = 0x00, - .devfn = (0x0a << 3)|0x0, /* 0x0a is PCI2 */ - .irq = { - [0] = { /* <-- 0 means this is INTA# output from the device or slot */ - .link = LINK_PIRQD, - .bitmap = IRQ_BITMAP_LINKD - }, - [1] = { /* <-- 1 means this is INTB# output from the device or slot */ - .link = LINK_PIRQA, - .bitmap = IRQ_BITMAP_LINKA - }, - [2] = { /* <-- 2 means this is INTC# output from the device or slot */ - .link = LINK_PIRQB, - .bitmap = IRQ_BITMAP_LINKB - }, - [3] = { /* <-- 3 means this is INTD# output from the device or slot */ - .link = LINK_PIRQC, - .bitmap = IRQ_BITMAP_LINKC - } - } - }, -/* - * PCI3 - */ - [7] = { - .slot = 0x3, /* This is real PCI slot. */ - .bus = 0x00, - .devfn = (0x0b << 3)|0x0, /* 0x0b is PCI3 */ - .irq = { - [0] = { /* <-- 0 means this is INTA# output from the device or slot */ - .link = LINK_PIRQC, - .bitmap = IRQ_BITMAP_LINKC - }, - [1] = { /* <-- 1 means this is INTB# output from the device or slot */ - .link = LINK_PIRQD, - .bitmap = IRQ_BITMAP_LINKD - }, - [2] = { /* <-- 2 means this is INTC# output from the device or slot */ - .link = LINK_PIRQA, - .bitmap = IRQ_BITMAP_LINKA - }, - [3] = { /* <-- 3 means this is INTD# output from the device or slot */ - .link = LINK_PIRQB, - .bitmap = IRQ_BITMAP_LINKB - } - } - }, -/* - * PCI4 - */ - [8] = { - .slot = 0x4, /* This is real PCI slot. */ - .bus = 0x00, - .devfn = (0x0c << 3)|0x0, /* 0x0c is PCI4 */ - .irq = { - [0] = { /* <-- 0 means this is INTA# output from the device or slot */ - .link = LINK_PIRQB, - .bitmap = IRQ_BITMAP_LINKB - }, - [1] = { /* <-- 1 means this is INTB# output from the device or slot */ - .link = LINK_PIRQC, - .bitmap = IRQ_BITMAP_LINKC - }, - [2] = { /* <-- 2 means this is INTC# output from the device or slot */ - .link = LINK_PIRQD, - .bitmap = IRQ_BITMAP_LINKD - }, - [3] = { /* <-- 3 means this is INTD# output from the device or slot */ - .link = LINK_PIRQA, - .bitmap = IRQ_BITMAP_LINKA - } - } - }, - } -}; - -unsigned long write_pirq_routing_table(unsigned long addr) -{ - /* Put the PIR table in memory and checksum. */ - return copy_pirq_routing_table(addr, &intel_irq_routing_table); -} diff --git a/src/mainboard/iei/pcisa-lx-800-r10/romstage.c b/src/mainboard/iei/pcisa-lx-800-r10/romstage.c deleted file mode 100644 index 67b5266bac..0000000000 --- a/src/mainboard/iei/pcisa-lx-800-r10/romstage.c +++ /dev/null @@ -1,73 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007 Advanced Micro Devices, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <stdint.h> -#include <stdlib.h> -#include <device/pci_def.h> -#include <arch/io.h> -#include <device/pnp_def.h> -#include <console/console.h> -#include <cpu/x86/bist.h> -#include <cpu/x86/msr.h> -#include <cpu/amd/car.h> -#include <cpu/amd/lxdef.h> -#include <southbridge/amd/cs5536/cs5536.h> -#include <spd.h> -#include <superio/winbond/common/winbond.h> -#include <superio/winbond/w83627hf/w83627hf.h> -#include <northbridge/amd/lx/raminit.h> - -#define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1) - -int spd_read_byte(unsigned int device, unsigned int address) -{ - return smbus_read_byte(device, address); -} - -#include "northbridge/amd/lx/pll_reset.c" -#include "cpu/amd/geode_lx/cpureginit.c" -#include "cpu/amd/geode_lx/syspreinit.c" -#include "cpu/amd/geode_lx/msrinit.c" - -void asmlinkage mainboard_romstage_entry(unsigned long bist) -{ - - static const struct mem_controller memctrl[] = { - {.channel0 = {DIMM0, DIMM1}} - }; - - SystemPreInit(); - msr_init(); - - cs5536_early_setup(); - - /* Note: must do this AFTER the early_setup! It is counting on some - * early MSR setup for CS5536. - */ - winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); - console_init(); - - /* Halt if there was a built in self test failure */ - report_bist_failure(bist); - - pll_reset(); - - cpuRegInit(0, DIMM0, DIMM1, DRAM_TERMINATED); - - sdram_initialize(1, memctrl); - - /* Memory is setup. Return to cache_as_ram.inc and continue to boot. */ -} |