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authorAlexandru Gagniuc <mr.nuke.me@gmail.com>2011-04-11 20:17:22 +0000
committerStefan Reinauer <stepan@openbios.org>2011-04-11 20:17:22 +0000
commit5005bb06c17461ef75cd1fef55c24dffaa05e580 (patch)
tree2c38986a89152225ad56cb44227f5bc6ddbecd06 /src/mainboard/iei
parent1fa61ebb3344105ae633ed7eb1be05cc574b666c (diff)
downloadcoreboot-5005bb06c17461ef75cd1fef55c24dffaa05e580.tar.xz
Unify use of post_code
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6487 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/iei')
-rw-r--r--src/mainboard/iei/pcisa-lx-800-r10/romstage.c2
1 files changed, 0 insertions, 2 deletions
diff --git a/src/mainboard/iei/pcisa-lx-800-r10/romstage.c b/src/mainboard/iei/pcisa-lx-800-r10/romstage.c
index b5dcf22a3f..57d51e37a3 100644
--- a/src/mainboard/iei/pcisa-lx-800-r10/romstage.c
+++ b/src/mainboard/iei/pcisa-lx-800-r10/romstage.c
@@ -28,7 +28,6 @@
#include "cpu/x86/bist.h"
#include "cpu/x86/msr.h"
#include <cpu/amd/lxdef.h>
-#include <cpu/amd/geode_post_code.h>
#include "southbridge/amd/cs5536/cs5536.h"
#include <spd.h>
#include "southbridge/amd/cs5536/early_smbus.c"
@@ -60,7 +59,6 @@ static inline int spd_read_byte(unsigned int device, unsigned int address)
void main(unsigned long bist)
{
- post_code(0x01);
static const struct mem_controller memctrl[] = {
{.channel0 = {DIMM0, DIMM1}}