AMD Geode cpus: apply un-written naming rules

Kconfig directives to select chip drivers for compile literally
match the chip directory names capitalized and underscored.

Rename directories and Kconfig as follows:
   model_lx  -> geode_lx
   model_gx1 -> geode_gx1
   model_gx2 -> geode_gx2

Change-Id: Ib8bf1e758b88f9efed1cf8b11c76b796388e7147
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/613
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>

7 files changed, 9 insertions, 9 deletions

diff --git a/src/mainboard/iei/juki-511p/Kconfig b/src/mainboard/iei/juki-511p/Kconfig
index d948929a04..e44253f610 100644
--- a/src/mainboard/iei/juki-511p/Kconfig
+++ b/src/mainboard/iei/juki-511p/Kconfig
@@ -21,7 +21,7 @@ if BOARD_IEI_JUKI_511P
 config BOARD_SPECIFIC_OPTIONS # dummy
 	def_bool y
 	select ARCH_X86
-	select CPU_AMD_GX1
+	select CPU_AMD_GEODE_GX1
 	select NORTHBRIDGE_AMD_GX1
 	select SOUTHBRIDGE_AMD_CS5530
 	select SUPERIO_WINBOND_W83977F
diff --git a/src/mainboard/iei/juki-511p/devicetree.cb b/src/mainboard/iei/juki-511p/devicetree.cb
index be5f064b5c..8592c091db 100644
--- a/src/mainboard/iei/juki-511p/devicetree.cb
+++ b/src/mainboard/iei/juki-511p/devicetree.cb
@@ -50,7 +50,7 @@ chip northbridge/amd/gx1
     end
   end
 
-  chip cpu/amd/model_gx1
+  chip cpu/amd/geode_gx1
   end
 
 end
diff --git a/src/mainboard/iei/nova4899r/Kconfig b/src/mainboard/iei/nova4899r/Kconfig
index 3cc5ddb04b..a829796794 100644
--- a/src/mainboard/iei/nova4899r/Kconfig
+++ b/src/mainboard/iei/nova4899r/Kconfig
@@ -21,7 +21,7 @@ if BOARD_IEI_NOVA_4899R
 config BOARD_SPECIFIC_OPTIONS # dummy
 	def_bool y
 	select ARCH_X86
-	select CPU_AMD_GX1
+	select CPU_AMD_GEODE_GX1
 	select NORTHBRIDGE_AMD_GX1
 	select SOUTHBRIDGE_AMD_CS5530
 	select SUPERIO_WINBOND_W83977TF
diff --git a/src/mainboard/iei/nova4899r/devicetree.cb b/src/mainboard/iei/nova4899r/devicetree.cb
index e6a0c8000a..8055fb1e68 100644
--- a/src/mainboard/iei/nova4899r/devicetree.cb
+++ b/src/mainboard/iei/nova4899r/devicetree.cb
@@ -57,7 +57,7 @@ chip northbridge/amd/gx1
     end
   end
 
-  chip cpu/amd/model_gx1
+  chip cpu/amd/geode_gx1
   end
 
 end
diff --git a/src/mainboard/iei/pcisa-lx-800-r10/Kconfig b/src/mainboard/iei/pcisa-lx-800-r10/Kconfig
index e393609c88..eae72aef4d 100644
--- a/src/mainboard/iei/pcisa-lx-800-r10/Kconfig
+++ b/src/mainboard/iei/pcisa-lx-800-r10/Kconfig
@@ -3,7 +3,7 @@ if BOARD_IEI_PCISA_LX_800_R10
 config BOARD_SPECIFIC_OPTIONS # dummy
 	def_bool y
 	select ARCH_X86
-	select CPU_AMD_LX
+	select CPU_AMD_GEODE_LX
 	select NORTHBRIDGE_AMD_LX
 	select SOUTHBRIDGE_AMD_CS5536
 	select SUPERIO_WINBOND_W83627HF
diff --git a/src/mainboard/iei/pcisa-lx-800-r10/devicetree.cb b/src/mainboard/iei/pcisa-lx-800-r10/devicetree.cb
index a7e74d0442..2d37ecf438 100644
--- a/src/mainboard/iei/pcisa-lx-800-r10/devicetree.cb
+++ b/src/mainboard/iei/pcisa-lx-800-r10/devicetree.cb
@@ -68,7 +68,7 @@ chip northbridge/amd/lx
 	end
 	# APIC cluster is late CPU init.
 	device lapic_cluster 0 on
-		chip cpu/amd/model_lx
+		chip cpu/amd/geode_lx
 			device lapic 0 on end
 		end
 	end
diff --git a/src/mainboard/iei/pcisa-lx-800-r10/romstage.c b/src/mainboard/iei/pcisa-lx-800-r10/romstage.c
index 4121e3e91d..aec984327a 100644
--- a/src/mainboard/iei/pcisa-lx-800-r10/romstage.c
+++ b/src/mainboard/iei/pcisa-lx-800-r10/romstage.c
@@ -53,9 +53,9 @@ static inline int spd_read_byte(unsigned int device, unsigned int address)
 #include "northbridge/amd/lx/pll_reset.c"
 #include "northbridge/amd/lx/raminit.c"
 #include "lib/generic_sdram.c"
-#include "cpu/amd/model_lx/cpureginit.c"
-#include "cpu/amd/model_lx/syspreinit.c"
-#include "cpu/amd/model_lx/msrinit.c"
+#include "cpu/amd/geode_lx/cpureginit.c"
+#include "cpu/amd/geode_lx/syspreinit.c"
+#include "cpu/amd/geode_lx/msrinit.c"
 
 void main(unsigned long bist)
 {