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| author | Bernardo Perez Priego <bernardo.perez.priego@intel.com> | 2021-04-28 14:56:25 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-05-06 14:36:01 +0000 |
| commit | e73e1ce9dec3522aa760d011e056e35047845645 (patch) | |
| tree | 44d266255b5b7cc152f876c1649fd7cdc900e632 /src/mainboard/intel/adlrvp/devicetree_m.cb | |
| parent | 50ece62d3c3c874108bfe089c8f5061423152a39 (diff) | |
| download | coreboot-e73e1ce9dec3522aa760d011e056e35047845645.tar.xz | |
mb/intel/adlrvp_m: Disable Type-C xDCI
Disabling this pci 0d.1 device since it is not required.
TEST= Boot to OS.
Signed-off-by: Bernardo Perez Priego <bernardo.perez.priego@intel.com>
Change-Id: Iccdf38111e3961ba887829abfa4146a9b37df9be
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52744
Reviewed-by: Bora Guvendik <bora.guvendik@intel.com>
Reviewed-by: Sukumar Ghorai <sukumar.ghorai@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/intel/adlrvp/devicetree_m.cb')
| -rw-r--r-- | src/mainboard/intel/adlrvp/devicetree_m.cb | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/intel/adlrvp/devicetree_m.cb b/src/mainboard/intel/adlrvp/devicetree_m.cb index ec33ee147f..51d97bcbe5 100644 --- a/src/mainboard/intel/adlrvp/devicetree_m.cb +++ b/src/mainboard/intel/adlrvp/devicetree_m.cb @@ -164,7 +164,7 @@ chip soc/intel/alderlake device pci 09.0 off end # NPK device pci 0a.0 off end # Crash-log SRAM device pci 0d.0 on end # USB xHCI - device pci 0d.1 on end # USB xDCI (OTG) + device pci 0d.1 off end # USB xDCI (OTG) device pci 0d.2 on end # TBT DMA0 device pci 0d.3 on end # TBT DMA1 device pci 0e.0 off end # VMD |