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authorMaulik V Vaghela <maulik.v.vaghela@intel.com>2021-02-03 15:10:50 +0530
committerPatrick Georgi <pgeorgi@google.com>2021-03-28 16:01:04 +0000
commitfb670fee3c8729a3b64f1fc171eb59073774029a (patch)
treeed2b4133253a98a60897830137c88d841f9c7e18 /src/mainboard/intel/adlrvp/spd
parentaf53ab38ad316a2669ae0db65cf3f8cd19ae84f1 (diff)
downloadcoreboot-fb670fee3c8729a3b64f1fc171eb59073774029a.tar.xz
mb/intel/adlrvp_m: Enable ADL_M RVP LP4 memory configuration
List of changes: 1. Add board Ids for ADL-M LP4 configuration 2. Add spd hex files for LP4 configuration 3. Update memory.c file with correct Dq-dqs and byte mapping for LP4 BUG=None BRANCH=None TEST=Build and boot is successful for ADL M LP4 RVP Change-Id: Id817faee3fff2a8a911ebda35774dfb6ddc5524b Signed-off-by: Maulik V Vaghela <maulik.v.vaghela@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50257 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Ronak Kanabar <ronak.kanabar@intel.com> Reviewed-by: Subrata Banik <subrata.banik@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/intel/adlrvp/spd')
-rw-r--r--src/mainboard/intel/adlrvp/spd/Makefile.inc16
-rw-r--r--src/mainboard/intel/adlrvp/spd/adlrvp_m_lp4.spd.hex32
2 files changed, 40 insertions, 8 deletions
diff --git a/src/mainboard/intel/adlrvp/spd/Makefile.inc b/src/mainboard/intel/adlrvp/spd/Makefile.inc
index 6e6709fd7c..945e3eb347 100644
--- a/src/mainboard/intel/adlrvp/spd/Makefile.inc
+++ b/src/mainboard/intel/adlrvp/spd/Makefile.inc
@@ -1,10 +1,10 @@
## SPDX-License-Identifier: GPL-2.0-only
-SPD_SOURCES = adlrvp_lp4 # 0b000
-SPD_SOURCES += empty # 0b001
-SPD_SOURCES += empty # 0b002
-SPD_SOURCES += adlrvp_lp5 # 0b003
-SPD_SOURCES += empty # 0b004
-SPD_SOURCES += empty # 0b005
-SPD_SOURCES += empty # 0b006
-SPD_SOURCES += adlrvp_lp5 # 0b007
+SPD_SOURCES = adlrvp_lp4 # 0b000
+SPD_SOURCES += adlrvp_m_lp4 # 0b001
+SPD_SOURCES += empty # 0b002
+SPD_SOURCES += adlrvp_lp5 # 0b003
+SPD_SOURCES += empty # 0b004
+SPD_SOURCES += empty # 0b005
+SPD_SOURCES += empty # 0b006
+SPD_SOURCES += adlrvp_lp5 # 0b007
diff --git a/src/mainboard/intel/adlrvp/spd/adlrvp_m_lp4.spd.hex b/src/mainboard/intel/adlrvp/spd/adlrvp_m_lp4.spd.hex
new file mode 100644
index 0000000000..4960258ff1
--- /dev/null
+++ b/src/mainboard/intel/adlrvp/spd/adlrvp_m_lp4.spd.hex
@@ -0,0 +1,32 @@
+23 11 11 0E 16 29 B9 08 00 40 00 00 02 01 00 00
+48 00 04 FF 92 54 05 00 8C 00 90 A8 90 E0 0B F0
+05 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 7F E1 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 55 00 00 00 20 20 20 20 20 20 20
+20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00