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author | Saurabh Satija <saurabh.satija@intel.com> | 2016-05-26 16:08:45 -0700 |
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committer | Aaron Durbin <adurbin@chromium.org> | 2016-07-01 03:21:22 +0200 |
commit | 90e716691df44d82e38039ce4be20d80f9b4f030 (patch) | |
tree | 9760456d36a89d399321bfdde86e0bcef5c17a0f /src/mainboard/intel/amenia/dsdt.asl | |
parent | 734aa8713c7d169501ff74c0e7b02ba7e9cd9e71 (diff) | |
download | coreboot-90e716691df44d82e38039ce4be20d80f9b4f030.tar.xz |
mainboard/intel/amenia: add NHLT support
Add ACPI NHLT table generation that the current hardware
supports as well select the hardware used on the board.
Amenia has support for two audio codecs, Dialog for
headsets and Maxim for speakers.
Change-Id: Iaba9ec81ffb4f128f2e4413dec5174d9ecb856c9
Signed-off-by: Saurabh Satija <saurabh.satija@intel.com>
Reviewed-on: https://review.coreboot.org/15024
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/mainboard/intel/amenia/dsdt.asl')
-rw-r--r-- | src/mainboard/intel/amenia/dsdt.asl | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/src/mainboard/intel/amenia/dsdt.asl b/src/mainboard/intel/amenia/dsdt.asl index 4a64f87382..46404ed7ff 100644 --- a/src/mainboard/intel/amenia/dsdt.asl +++ b/src/mainboard/intel/amenia/dsdt.asl @@ -1,7 +1,7 @@ /* * This file is part of the coreboot project. * - * Copyright (C) 2015 Intel Corp. + * Copyright (C) 2016 Intel Corp. * (Written by Lance Zhao <lijian.zhao@intel.com> for Intel Corp.) * * This program is free software; you can redistribute it and/or modify @@ -33,15 +33,16 @@ DefinitionBlock( Scope (\_SB) { Device (PCI0) { - #include <soc/intel/apollolake/acpi/northbridge.asl> - #include <soc/intel/apollolake/acpi/southbridge.asl> + #include <soc/intel/apollolake/acpi/northbridge.asl> + #include <soc/intel/apollolake/acpi/southbridge.asl> + #include <soc/intel/apollolake/acpi/pch_hda.asl> } } /* Mainboard Specific devices */ #include "acpi/mainboard.asl" - /* Chipset specific sleep states */ - #include <soc/intel/apollolake/acpi/sleepstates.asl> + /* Chipset specific sleep states */ + #include <soc/intel/apollolake/acpi/sleepstates.asl> #include "acpi/superio.asl" } |