diff options
author | Aaron Durbin <adurbin@chromium.org> | 2016-07-25 21:31:41 -0500 |
---|---|---|
committer | Duncan Laurie <dlaurie@chromium.org> | 2016-07-30 01:36:32 +0200 |
commit | b0f81518b5c17466bc95ebdef292e82c4b76bc88 (patch) | |
tree | 7174d0006c9a8450ada5aeb7c6fe6377407e96a6 /src/mainboard/intel/amenia | |
parent | 212820c8d728c59fa3228ce92bc1d549b232e35a (diff) | |
download | coreboot-b0f81518b5c17466bc95ebdef292e82c4b76bc88.tar.xz |
chromeos mainboards: remove chromeos.asl
Use the ACPI generator for creating the Chrome OS gpio
package. Each mainboard has its own list of Chrome OS
gpios that are fed into a helper to generate the ACPI
external OIPG package. Additionally, the common
chromeos.asl is now conditionally included based on
CONFIG_CHROMEOS.
Change-Id: I1d3d951964374a9d43521879d4c265fa513920d2
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/15909
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Diffstat (limited to 'src/mainboard/intel/amenia')
-rw-r--r-- | src/mainboard/intel/amenia/acpi/chromeos.asl | 24 | ||||
-rw-r--r-- | src/mainboard/intel/amenia/chromeos.c | 11 | ||||
-rw-r--r-- | src/mainboard/intel/amenia/dsdt.asl | 3 |
3 files changed, 11 insertions, 27 deletions
diff --git a/src/mainboard/intel/amenia/acpi/chromeos.asl b/src/mainboard/intel/amenia/acpi/chromeos.asl deleted file mode 100644 index 31d0afc8c3..0000000000 --- a/src/mainboard/intel/amenia/acpi/chromeos.asl +++ /dev/null @@ -1,24 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2013 Google Inc. - * Copyright (C) 2016 Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <soc/gpio_defs.h> - -Name (OIPG, Package () { - /* No physical recovery GPIO. */ - Package () { 0x0001, 0, 0xFFFFFFFF, "INT3452:01" }, - /* Firmware write protect GPIO. */ - Package () { 0x0003, 1, PAD_NW(GPIO_75), "INT3452:01" }, -}) diff --git a/src/mainboard/intel/amenia/chromeos.c b/src/mainboard/intel/amenia/chromeos.c index b6669bf0e0..4cfc2a62a9 100644 --- a/src/mainboard/intel/amenia/chromeos.c +++ b/src/mainboard/intel/amenia/chromeos.c @@ -18,6 +18,7 @@ #include "ec.h" #include <ec/google/chromeec/ec.h> +#include <soc/gpio_defs.h> #include <vendorcode/google/chromeos/chromeos.h> int get_lid_switch(void) @@ -48,3 +49,13 @@ int get_write_protect_state(void) { return 0; } + +static const struct cros_gpio cros_gpios[] = { + CROS_GPIO_REC_AL(CROS_GPIO_VIRTUAL, GPIO_COMM_NW_NAME), + CROS_GPIO_WP_AH(PAD_NW(GPIO_75), GPIO_COMM_NW_NAME), +}; + +void mainboard_chromeos_acpi_generate(void) +{ + chromeos_acpi_gpio_generate(cros_gpios, ARRAY_SIZE(cros_gpios)); +} diff --git a/src/mainboard/intel/amenia/dsdt.asl b/src/mainboard/intel/amenia/dsdt.asl index 7602b1e80d..9314469d88 100644 --- a/src/mainboard/intel/amenia/dsdt.asl +++ b/src/mainboard/intel/amenia/dsdt.asl @@ -39,10 +39,7 @@ DefinitionBlock( } } - #if IS_ENABLED(CONFIG_CHROMEOS) - #include "acpi/chromeos.asl" #include <vendorcode/google/chromeos/acpi/chromeos.asl> - #endif /* Mainboard Specific devices */ #include "acpi/mainboard.asl" |