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authorLijian Zhao <lijian.zhao@intel.com>2019-01-11 07:54:48 -0800
committerNico Huber <nico.h@gmx.de>2019-01-11 18:59:21 +0000
commit64925b5128d8ed27bd1780f6cb25805aecc659e6 (patch)
tree1f82ad27170650310126751cab059b649d07d3c4 /src/mainboard/intel/apollolake_rvp
parentdd217362d44f197b08fa69f3c2c14e743e1bc90b (diff)
downloadcoreboot-64925b5128d8ed27bd1780f6cb25805aecc659e6.tar.xz
soc/mainboard: Update mainboard UART Kconfig
After f5ca922 (Untangle CBFS microcode updates) got merged, all mainboard using intel apollolake, cannonlake, coffeelake, glk, kabylake, skylake, icelake and whiskeylake get affected. Using INTEL_LPSS_UART_FOR_CONSOLE instead of UART_DEBUG and set default console for each platform. BUG=N/A TEST=Build and test on Sarien platform, by default we can still get console from cbmem, and enable CONSOLE_SERIAL can get logs from UART port 2. Signed-off-by: Lijian Zhao <lijian.zhao@intel.com> Change-Id: I550a00144cff21420537bb161c64e7a132c5d2de Reviewed-on: https://review.coreboot.org/c/30853 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Bora Guvendik <bora.guvendik@intel.com> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/mainboard/intel/apollolake_rvp')
-rw-r--r--src/mainboard/intel/apollolake_rvp/Kconfig3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/mainboard/intel/apollolake_rvp/Kconfig b/src/mainboard/intel/apollolake_rvp/Kconfig
index 4afdf0d742..ed7d77f211 100644
--- a/src/mainboard/intel/apollolake_rvp/Kconfig
+++ b/src/mainboard/intel/apollolake_rvp/Kconfig
@@ -5,6 +5,7 @@ config BOARD_SPECIFIC_OPTIONS
select SOC_INTEL_APOLLOLAKE
select BOARD_ROMSIZE_KB_8192
select HAVE_ACPI_TABLES
+ select INTEL_LPSS_UART_FOR_CONSOLE
config MAINBOARD_DIR
string
@@ -18,4 +19,6 @@ config MAINBOARD_VENDOR
string
default "Intel"
+config UART_FOR_CONSOLE
+ default 2
endif