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| author | Marshall Dawson <marshalldawson3rd@gmail.com> | 2019-09-12 20:21:28 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2019-10-20 16:46:07 +0000 |
| commit | 80df052d355ba2db3bb1b6e6e2c05d05a9ce6ad0 (patch) | |
| tree | ced11bee7f99a84c63c129fd9082c18d48beb95b /src/mainboard/intel/baskingridge | |
| parent | 59e97b6378694d1807895c573624b7a2532bebfd (diff) | |
| download | coreboot-80df052d355ba2db3bb1b6e6e2c05d05a9ce6ad0.tar.xz | |
cbmem: Add IDs for TSEG and BERT table data
Prepare for products that can use any DRAM for TSEG.
Include an ID for data pointed to by an ACPI BERT table. This region's
only requirement is it is marked reserved.
Change-Id: Ia6518e881b0add71c622e65572474e0041f83d61
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36115
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/intel/baskingridge')
0 files changed, 0 insertions, 0 deletions