summaryrefslogtreecommitdiff
path: root/src/mainboard/intel/baskingridge
diff options
context:
space:
mode:
authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-08-16 14:02:25 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2019-08-18 19:03:22 +0000
commit157b189f6b97b6e9ecd8d29edbbd045fbbc231f5 (patch)
tree4562bd212e40d0832fa893935d85a06d82f8a897 /src/mainboard/intel/baskingridge
parent146c09823333c52e8bbca98465ccc8512ec1daa2 (diff)
downloadcoreboot-157b189f6b97b6e9ecd8d29edbbd045fbbc231f5.tar.xz
cpu/intel: Enter romstage without BIST
When entry to romstage is via cpu/intel/car/romstage.c BIST has not been passed down the path for sometime. Change-Id: I345975c53014902269cee21fc393331d33a84dce Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34908 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/mainboard/intel/baskingridge')
-rw-r--r--src/mainboard/intel/baskingridge/romstage.c3
1 files changed, 1 insertions, 2 deletions
diff --git a/src/mainboard/intel/baskingridge/romstage.c b/src/mainboard/intel/baskingridge/romstage.c
index b43110bab1..3fd9aab9c7 100644
--- a/src/mainboard/intel/baskingridge/romstage.c
+++ b/src/mainboard/intel/baskingridge/romstage.c
@@ -63,7 +63,7 @@ const struct rcba_config_instruction rcba_config[] = {
RCBA_END_CONFIG,
};
-void mainboard_romstage_entry(unsigned long bist)
+void mainboard_romstage_entry(void)
{
struct pei_data pei_data = {
.pei_version = PEI_VERSION,
@@ -136,7 +136,6 @@ void mainboard_romstage_entry(unsigned long bist)
.pei_data = &pei_data,
.gpio_map = &mainboard_gpio_map,
.rcba_config = &rcba_config[0],
- .bist = bist,
.copy_spd = NULL,
};