mb/*/*: Drop FSP_BAYTRAIL support

Relocatable ramstage, postcar stage and C_ENVIRONMENT_BOOTBLOCK are
now mandatory features, which this platform lacks.

Change-Id: I08c21fd7e5cf8996911c3912bdbaf12d6450db42
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36981
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>

1 files changed, 0 insertions, 35 deletions

diff --git a/src/mainboard/intel/bayleybay_fsp/mainboard.c b/src/mainboard/intel/bayleybay_fsp/mainboard.c
deleted file mode 100644
index f6ba0355ee..0000000000
--- a/src/mainboard/intel/bayleybay_fsp/mainboard.c
+++ /dev/null
@@ -1,35 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007-2009 coresystems GmbH
- * Copyright (C) 2011 The ChromiumOS Authors.  All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include <types.h>
-#include <device/device.h>
-#include <device/pci_def.h>
-#if CONFIG(VGA_ROM_RUN)
-#include <x86emu/x86emu.h>
-#endif
-
-/*
- * mainboard_enable is executed as first thing after enumerate_buses().
- * This is the earliest point to add customization.
- */
-static void mainboard_enable(struct device *dev)
-{
-
-}
-
-struct chip_operations mainboard_ops = {
-	.enable_dev = mainboard_enable,
-};