diff options
author | York Yang <york.yang@intel.com> | 2016-03-09 11:19:51 -0800 |
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committer | Martin Roth <martinroth@google.com> | 2016-04-15 16:21:36 +0200 |
commit | 9c6c791351d78b11aaaa1f31d4085da16b5579f6 (patch) | |
tree | 12bffecba1ee37a63ab2b1661e5533ad7b807287 /src/mainboard/intel/camelbackmountain_fsp/romstage.c | |
parent | c42b7864851040b2ec19adc93f8635bcaf1e652b (diff) | |
download | coreboot-9c6c791351d78b11aaaa1f31d4085da16b5579f6.tar.xz |
mainboard/intel: Add Broadwell-DE based Camelback Mountain CRB
Initial files to support Camelback Mountain CRB. This board uses
Broadwell-DE code which is based on FSP 1.0. Change is based on
Broadwell-DE Gold release.
Windows 7 and Fedora 21 have been verified using SeaBIOS payload,
also Fedora 21 with U-Boot payload.
Change-Id: Ie249588b79430084adeebbcdd8b483d936c655e3
Signed-off-by: York Yang <york.yang@intel.com>
Reviewed-on: https://review.coreboot.org/14015
Tested-by: build bot (Jenkins)
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Diffstat (limited to 'src/mainboard/intel/camelbackmountain_fsp/romstage.c')
-rw-r--r-- | src/mainboard/intel/camelbackmountain_fsp/romstage.c | 45 |
1 files changed, 45 insertions, 0 deletions
diff --git a/src/mainboard/intel/camelbackmountain_fsp/romstage.c b/src/mainboard/intel/camelbackmountain_fsp/romstage.c new file mode 100644 index 0000000000..cf52c01f04 --- /dev/null +++ b/src/mainboard/intel/camelbackmountain_fsp/romstage.c @@ -0,0 +1,45 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2013 Google Inc. + * Copyright (C) 2015 Intel Corp. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <stddef.h> +#include <soc/romstage.h> +#include <drivers/intel/fsp1_0/fsp_util.h> + +/** + * /brief mainboard call for setup that needs to be done before fsp init + * + */ +void early_mainboard_romstage_entry(void) +{ + +} + +/** + * /brief mainboard call for setup that needs to be done after fsp init + * + */ +void late_mainboard_romstage_entry(void) +{ + +} + +/** + * /brief customize fsp parameters here if needed + */ +void romstage_fsp_rt_buffer_callback(FSP_INIT_RT_BUFFER *FspRtBuffer) +{ + +} |