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| author | Martin Roth <martinroth@google.com> | 2017-06-24 21:53:37 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-07-06 00:19:56 +0000 |
| commit | 356b519049e6d40e15b2e4a85cae654e2e8df8ba (patch) | |
| tree | 734c42399af1d7ee2f25588e2bd962922e514f0a /src/mainboard/intel/cougar_canyon2 | |
| parent | f95911ad3765c0f94db241b0c95a6c0a8c608077 (diff) | |
| download | coreboot-356b519049e6d40e15b2e4a85cae654e2e8df8ba.tar.xz | |
mainboard/[g-l]: add IS_ENABLED() around Kconfig symbol references
Change-Id: I1f906c8c465108017bc4d08534653233078ef32d
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/20343
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/mainboard/intel/cougar_canyon2')
| -rw-r--r-- | src/mainboard/intel/cougar_canyon2/romstage.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/intel/cougar_canyon2/romstage.c b/src/mainboard/intel/cougar_canyon2/romstage.c index bf5b738754..96c22ea367 100644 --- a/src/mainboard/intel/cougar_canyon2/romstage.c +++ b/src/mainboard/intel/cougar_canyon2/romstage.c @@ -213,7 +213,7 @@ void main(FSP_INFO_HEADER *fsp_info_header) pm1_cnt = inl(DEFAULT_PMBASE + PM1_CNT); post_code(0x46); if ((pm1_sts & WAK_STS) && ((pm1_cnt >> 10) & 7) == 5) { -#if CONFIG_HAVE_ACPI_RESUME +#if IS_ENABLED(CONFIG_HAVE_ACPI_RESUME) printk(BIOS_DEBUG, "Resume from S3 detected.\n"); boot_mode = 2; /* Clear SLP_TYPE. This will break stage2 but @@ -261,7 +261,7 @@ void romstage_main_continue(EFI_STATUS status, VOID *HobListPtr) { post_code(0x49); -#if CONFIG_USBDEBUG +#if IS_ENABLED(CONFIG_USBDEBUG) /* FSP reconfigures USB, so reinit it to have debug */ early_usbdebug_init(); #endif |