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| author | Damien Zammit <damien@zamaudio.com> | 2015-12-02 14:03:02 +1100 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-01-26 04:42:09 +0100 |
| commit | 2950cd2de173f8a4f0ffac32823b23774dac4db5 (patch) | |
| tree | 86e21d4f91f88fa36a3c351da2b0b6854452d37b /src/mainboard/intel/d510mo | |
| parent | 546f29dbf1613d40b6b816a87aa3c144b1cd0b90 (diff) | |
| download | coreboot-2950cd2de173f8a4f0ffac32823b23774dac4db5.tar.xz | |
mainboard/intel/d510mo: Licence fixes and azalia verb table
Azalia verb table replicated from vendor bios.
Licence headers added where appropriate.
Change-Id: I29e4fe433dee6c5f30fe36055fc9a8bf2062fef5
Signed-off-by: Damien Zammit <damien@zamaudio.com>
Reviewed-on: https://review.coreboot.org/12621
Tested-by: build bot (Jenkins)
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/mainboard/intel/d510mo')
| -rw-r--r-- | src/mainboard/intel/d510mo/cstates.c | 15 | ||||
| -rw-r--r-- | src/mainboard/intel/d510mo/hda_verb.c | 36 | ||||
| -rw-r--r-- | src/mainboard/intel/d510mo/romstage.c | 4 |
3 files changed, 51 insertions, 4 deletions
diff --git a/src/mainboard/intel/d510mo/cstates.c b/src/mainboard/intel/d510mo/cstates.c index 2d543ff62e..b7eb6df341 100644 --- a/src/mainboard/intel/d510mo/cstates.c +++ b/src/mainboard/intel/d510mo/cstates.c @@ -1,3 +1,18 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2015 Damien Zammit <damien@zamaudio.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + #include <device/device.h> #include <arch/x86/include/arch/acpigen.h> diff --git a/src/mainboard/intel/d510mo/hda_verb.c b/src/mainboard/intel/d510mo/hda_verb.c index 072a306131..a0dba38f59 100644 --- a/src/mainboard/intel/d510mo/hda_verb.c +++ b/src/mainboard/intel/d510mo/hda_verb.c @@ -1,7 +1,39 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2015 Damien Zammit <damien@zamaudio.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + #include <device/azalia_device.h> -const u32 cim_verb_data[0] = {}; +const u32 cim_verb_data[] = { + /* coreboot specific header */ + 0x10ec0662, + 0x8086d618, // Subsystem ID + 0x0000000a, // Number of entries -const u32 pc_beep_verbs[0] = {}; + /* Pin Widget Verb Table */ + AZALIA_PIN_CFG(0, 0x14, 0x01014410), + AZALIA_PIN_CFG(0, 0x15, 0x411111f0), + AZALIA_PIN_CFG(0, 0x16, 0x411111f0), + AZALIA_PIN_CFG(0, 0x18, 0x01a19840), + AZALIA_PIN_CFG(0, 0x19, 0x02a19841), + AZALIA_PIN_CFG(0, 0x1a, 0x0181304f), + AZALIA_PIN_CFG(0, 0x1b, 0x02214420), + AZALIA_PIN_CFG(0, 0x1c, 0x411111f0), + AZALIA_PIN_CFG(0, 0x1d, 0x4015c603), + AZALIA_PIN_CFG(0, 0x1e, 0x99430130), +}; +const u32 pc_beep_verbs[] = { +}; AZALIA_ARRAY_SIZES; diff --git a/src/mainboard/intel/d510mo/romstage.c b/src/mainboard/intel/d510mo/romstage.c index b0bd0c02ce..f6e957e3b7 100644 --- a/src/mainboard/intel/d510mo/romstage.c +++ b/src/mainboard/intel/d510mo/romstage.c @@ -125,9 +125,9 @@ void main(unsigned long bist) post_code(0x30); - printk(BIOS_DEBUG, "Start native raminit\n"); + printk(BIOS_DEBUG, "Initializing memory\n"); sdram_initialize(0, spd_addrmap); - printk(BIOS_DEBUG, "Native raminit done\n"); + printk(BIOS_DEBUG, "Memory initialized\n"); post_code(0x31); ram_check(0x200000,0x300000); |