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authorArthur Heymans <arthur@aheymans.xyz>2018-06-15 22:02:28 +0200
committerFelix Held <felix-coreboot@felixheld.de>2018-11-12 14:06:37 +0000
commitb9d2589ca40026b543ecb5b008ce0d1bc346bf53 (patch)
tree87cac45cfc1c1211f012aaa76b8a87162f092aff /src/mainboard/intel/d510mo
parent81dd52b7eb663c6098de5d8c7c56ed572c91b539 (diff)
downloadcoreboot-b9d2589ca40026b543ecb5b008ce0d1bc346bf53.tar.xz
mb/*/*: Harmonise FD and devicetree on boards featuring ICH7
On some boards the devicetree and Function Disable register did not match. In this case the FD values are put in the devicetree as these were the values that were actually used in practice. A complete devicetree will make it easier to automatically disable devices in ramstage. Change-Id: I1692ca5f490ea84e2fc520d3f66044ad7514f76e Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/27122 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/mainboard/intel/d510mo')
-rw-r--r--src/mainboard/intel/d510mo/devicetree.cb5
1 files changed, 4 insertions, 1 deletions
diff --git a/src/mainboard/intel/d510mo/devicetree.cb b/src/mainboard/intel/d510mo/devicetree.cb
index 473303842e..a80180a32e 100644
--- a/src/mainboard/intel/d510mo/devicetree.cb
+++ b/src/mainboard/intel/d510mo/devicetree.cb
@@ -49,12 +49,15 @@ chip northbridge/intel/pineview # Northbridge
device pci 1c.1 on end # PCIe 2
device pci 1c.2 on end # PCIe 3
device pci 1c.3 on end # PCIe 4
+ # (PCIe 5 and 6 not on nm10?)
device pci 1d.0 on end # USB
device pci 1d.1 on end # USB
device pci 1d.2 on end # USB
device pci 1d.3 on end # USB
device pci 1d.7 on end # USB
device pci 1e.0 on end # PCI bridge
+ #device pci 1e.2 off end # AC'97 Audio (not on nm10?)
+ #device pci 1e.3 off end # AC'97 Modem (not on nm10?)
device pci 1f.0 on # ISA bridge
chip superio/winbond/w83627thg # Super I/O
device pnp 4e.0 off end # Floppy
@@ -90,7 +93,7 @@ chip northbridge/intel/pineview # Northbridge
end
end
end
- device pci 1f.1 off end
+ device pci 1f.1 off end # PATA
device pci 1f.2 on end # SATA
device pci 1f.3 on # SMbus
chip drivers/i2c/ck505 # ICS9EPRS525