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| author | Arthur Heymans <arthur@aheymans.xyz> | 2018-01-06 18:40:23 +0100 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2018-01-17 17:09:13 +0000 |
| commit | 0a4e0fd913006de8f5d0a4ea24e013f30243cf5c (patch) | |
| tree | 47d8e59bd239a7b6b74d25393f9e3efe6cf1e223 /src/mainboard/intel/d945gclf/dsdt.asl | |
| parent | 30bba281b9b4330f5fadf36d187c2512f94c29e0 (diff) | |
| download | coreboot-0a4e0fd913006de8f5d0a4ea24e013f30243cf5c.tar.xz | |
cpu/intel/speedstep: Fix the PNOT ACPI method
The PNOT method never notifies the CPU to update it's _CST methods due
to reliance on inexisting variable (PDCx).
Add a method in the speedstep ssdt generator to notify all available
CPU nodes and hook this up in this file.
The cpu.asl file is moved to cpu/intel/speedstep/acpi since it now
relies on code generated in the speedstep ssdt generator. CPUs not
using the speedstep code never included this PNOT method so this is
a logical place for this code to be.
Change-Id: Ie2ba5e07b401d6f7c80c31f2bfcd9ef3ac0c1ad1
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/23144
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/intel/d945gclf/dsdt.asl')
| -rw-r--r-- | src/mainboard/intel/d945gclf/dsdt.asl | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/intel/d945gclf/dsdt.asl b/src/mainboard/intel/d945gclf/dsdt.asl index 187481a1e2..cbc1573a2e 100644 --- a/src/mainboard/intel/d945gclf/dsdt.asl +++ b/src/mainboard/intel/d945gclf/dsdt.asl @@ -38,7 +38,7 @@ DefinitionBlock( // Thermal Zone //#include "acpi/thermal.asl" - #include <cpu/intel/common/acpi/cpu.asl> + #include <cpu/intel/speedstep/acpi/cpu.asl> Scope (\_SB) { Device (PCI0) |