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| author | Uwe Hermann <uwe@hermann-uwe.de> | 2010-11-21 22:47:22 +0000 |
|---|---|---|
| committer | Uwe Hermann <uwe@hermann-uwe.de> | 2010-11-21 22:47:22 +0000 |
| commit | 7b997053eb2fcde464f5f6a1e5c85d1ffb6b4e32 (patch) | |
| tree | 5339d014fbd29d3eb27cc82987eb7d655d9d8d1a /src/mainboard/intel/d945gclf | |
| parent | 57b2ff886e0ce2c92820f5722c8031def3ac94cf (diff) | |
| download | coreboot-7b997053eb2fcde464f5f6a1e5c85d1ffb6b4e32.tar.xz | |
Simplify a few code chunks, fix whitespace and indentation.
Also, remove some less useful comments, some dead code / unused functions.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6108 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/intel/d945gclf')
| -rw-r--r-- | src/mainboard/intel/d945gclf/romstage.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/src/mainboard/intel/d945gclf/romstage.c b/src/mainboard/intel/d945gclf/romstage.c index 8d155d1662..8b79f2dc57 100644 --- a/src/mainboard/intel/d945gclf/romstage.c +++ b/src/mainboard/intel/d945gclf/romstage.c @@ -201,9 +201,8 @@ void main(unsigned long bist) u32 reg32; int boot_mode = 0; - if (bist == 0) { + if (bist == 0) enable_lapic(); - } ich7_enable_lpc(); early_superio_config_lpc47m15x(); |