printk_foo -> printk(BIOS_FOO, ...)

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5266 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

5 files changed, 24 insertions, 24 deletions

diff --git a/src/mainboard/intel/d945gclf/acpi_tables.c b/src/mainboard/intel/d945gclf/acpi_tables.c
index 1f8b5299cc..6b2956d387 100644
--- a/src/mainboard/intel/d945gclf/acpi_tables.c
+++ b/src/mainboard/intel/d945gclf/acpi_tables.c
@@ -221,7 +221,7 @@ unsigned long write_acpi_tables(unsigned long start)
 	/* Align ACPI tables to 16byte */
 	ALIGN_CURRENT;
 
-	printk_info("ACPI: Writing ACPI tables at %lx.\n", start);
+	printk(BIOS_INFO, "ACPI: Writing ACPI tables at %lx.\n", start);
 
 	/* We need at least an RSDP and an RSDT Table */
 	rsdp = (acpi_rsdp_t *) current;
@@ -240,7 +240,7 @@ unsigned long write_acpi_tables(unsigned long start)
 	/*
 	 * We explicitly add these tables later on:
 	 */
-	printk_debug("ACPI:    * HPET\n");
+	printk(BIOS_DEBUG, "ACPI:    * HPET\n");
 
 	hpet = (acpi_hpet_t *) current;
 	current += sizeof(acpi_hpet_t);
@@ -249,7 +249,7 @@ unsigned long write_acpi_tables(unsigned long start)
 	acpi_add_table(rsdp, hpet);
 
 	/* If we want to use HPET Timers Linux wants an MADT */
-	printk_debug("ACPI:    * MADT\n");
+	printk(BIOS_DEBUG, "ACPI:    * MADT\n");
 
 	madt = (acpi_madt_t *) current;
 	acpi_create_madt(madt);
@@ -257,7 +257,7 @@ unsigned long write_acpi_tables(unsigned long start)
 	ALIGN_CURRENT;
 	acpi_add_table(rsdp, madt);
 
-	printk_debug("ACPI:    * MCFG\n");
+	printk(BIOS_DEBUG, "ACPI:    * MCFG\n");
 	mcfg = (acpi_mcfg_t *) current;
 	acpi_create_mcfg(mcfg);
 	current += mcfg->header.length;
@@ -265,7 +265,7 @@ unsigned long write_acpi_tables(unsigned long start)
 	acpi_add_table(rsdp, mcfg);
 
 #if OLD_ACPI
-	printk_debug("ACPI:    * OEMB\n");
+	printk(BIOS_DEBUG, "ACPI:    * OEMB\n");
 	oemb=(acpi_oemb_t *)current;
 	current += sizeof(acpi_oemb_t);
 	ALIGN_CURRENT;
@@ -273,7 +273,7 @@ unsigned long write_acpi_tables(unsigned long start)
 	acpi_add_table(rsdp, oemb);
 #endif
 
-	printk_debug("ACPI:     * FACS\n");
+	printk(BIOS_DEBUG, "ACPI:     * FACS\n");
 	facs = (acpi_facs_t *) current;
 	current += sizeof(acpi_facs_t);
 	ALIGN_CURRENT;
@@ -287,7 +287,7 @@ unsigned long write_acpi_tables(unsigned long start)
 #if OLD_ACPI
 	for (i=0; i < dsdt->length; i++) {
 		if (*(u32*)(((u32)dsdt) + i) == 0xC0DEBEEF) {
-			printk_debug("ACPI: Patching up DSDT at offset 0x%04x -> 0x%08x\n", i, 0x24 + (u32)oemb);
+			printk(BIOS_DEBUG, "ACPI: Patching up DSDT at offset 0x%04x -> 0x%08x\n", i, 0x24 + (u32)oemb);
 			*(u32*)(((u32)dsdt) + i) = 0x24 + (u32)oemb;
 			break;
 		}
@@ -299,7 +299,7 @@ unsigned long write_acpi_tables(unsigned long start)
 	/* Pack GNVS into the ACPI table area */
 	for (i=0; i < dsdt->length; i++) {
 		if (*(u32*)(((u32)dsdt) + i) == 0xC0DEBABE) {
-			printk_debug("ACPI: Patching up global NVS in DSDT at offset 0x%04x -> 0x%08x\n", i, current);
+			printk(BIOS_DEBUG, "ACPI: Patching up global NVS in DSDT at offset 0x%04x -> 0x%08x\n", i, current);
 			*(u32*)(((u32)dsdt) + i) = current; // 0x92 bytes
 			break;
 		}
@@ -320,18 +320,18 @@ unsigned long write_acpi_tables(unsigned long start)
 	dsdt->checksum = 0;
 	dsdt->checksum = acpi_checksum((void *)dsdt, dsdt->length);
 
-	printk_debug("ACPI:     * DSDT @ %p Length %x\n", dsdt,
+	printk(BIOS_DEBUG, "ACPI:     * DSDT @ %p Length %x\n", dsdt,
 		     dsdt->length);
 
 #if CONFIG_HAVE_ACPI_SLIC
-	printk_debug("ACPI:     * SLIC\n");
+	printk(BIOS_DEBUG, "ACPI:     * SLIC\n");
 	slic = (acpi_header_t *)current;
 	current += acpi_create_slic(current);
 	ALIGN_CURRENT;
 	acpi_add_table(rsdp, slic);
 #endif
 
-	printk_debug("ACPI:     * FADT\n");
+	printk(BIOS_DEBUG, "ACPI:     * FADT\n");
 	fadt = (acpi_fadt_t *) current;
 	current += sizeof(acpi_fadt_t);
 	ALIGN_CURRENT;
@@ -339,15 +339,15 @@ unsigned long write_acpi_tables(unsigned long start)
 	acpi_create_fadt(fadt, facs, dsdt);
 	acpi_add_table(rsdp, fadt);
 
-	printk_debug("ACPI:     * SSDT\n");
+	printk(BIOS_DEBUG, "ACPI:     * SSDT\n");
 	ssdt = (acpi_header_t *)current;
 	acpi_create_ssdt_generator(ssdt, "DYNADATA");
 	current += ssdt->length;
 	acpi_add_table(rsdp, ssdt);
 
-	printk_debug("current = %lx\n", current);
+	printk(BIOS_DEBUG, "current = %lx\n", current);
 
-	printk_debug("ACPI:     * DMI (Linux workaround)\n");
+	printk(BIOS_DEBUG, "ACPI:     * DMI (Linux workaround)\n");
 	memcpy((void *)0xfff80, dmi_table, DMI_TABLE_SIZE);
 #if CONFIG_WRITE_HIGH_TABLES == 1
 	memcpy((void *)current, dmi_table, DMI_TABLE_SIZE);
@@ -355,6 +355,6 @@ unsigned long write_acpi_tables(unsigned long start)
 	ALIGN_CURRENT;
 #endif
 
-	printk_info("ACPI: done.\n");
+	printk(BIOS_INFO, "ACPI: done.\n");
 	return current;
 }
diff --git a/src/mainboard/intel/d945gclf/mainboard_smi.c b/src/mainboard/intel/d945gclf/mainboard_smi.c
index 333a59e982..afe9eee57b 100644
--- a/src/mainboard/intel/d945gclf/mainboard_smi.c
+++ b/src/mainboard/intel/d945gclf/mainboard_smi.c
@@ -31,7 +31,7 @@ int mainboard_io_trap_handler(int smif)
 {
 	switch (smif) {
 	case 0x99:
-		printk_debug("Sample\n");
+		printk(BIOS_DEBUG, "Sample\n");
 		gnvs->smif = 0;
 		break;
 	default:
diff --git a/src/mainboard/intel/d945gclf/mptable.c b/src/mainboard/intel/d945gclf/mptable.c
index b2fce2508d..db5ee12b01 100644
--- a/src/mainboard/intel/d945gclf/mptable.c
+++ b/src/mainboard/intel/d945gclf/mptable.c
@@ -122,7 +122,7 @@ void *smp_write_config_table(void *v)
 	mc->mpe_checksum = smp_compute_checksum(smp_next_mpc_entry(mc), mc->mpe_length);
 	mc->mpc_checksum = smp_compute_checksum(mc, mc->mpc_length);
 
-	printk_debug("Wrote the mp table end at: %p - %p\n", mc, smp_next_mpe_entry(mc));
+	printk(BIOS_DEBUG, "Wrote the mp table end at: %p - %p\n", mc, smp_next_mpe_entry(mc));
 
 	return smp_next_mpe_entry(mc);
 }
diff --git a/src/mainboard/intel/d945gclf/romstage.c b/src/mainboard/intel/d945gclf/romstage.c
index 1441bb5597..131145cfb9 100644
--- a/src/mainboard/intel/d945gclf/romstage.c
+++ b/src/mainboard/intel/d945gclf/romstage.c
@@ -60,7 +60,7 @@
 static void setup_ich7_gpios(void)
 {
 	/* TODO: This is highly board specific and should be moved */
-	printk_debug(" GPIOS...");
+	printk(BIOS_DEBUG, " GPIOS...");
 	/* General Registers */
 	outl(0x3f3df7c1, DEFAULT_GPIOBASE + 0x00);	/* GPIO_USE_SEL */
 	outl(0xc6fcbfc3, DEFAULT_GPIOBASE + 0x04);	/* GP_IO_SEL */
@@ -254,7 +254,7 @@ void real_main(unsigned long bist)
 	report_bist_failure(bist);
 
 	if (MCHBAR16(SSKPD) == 0xCAFE) {
-		printk_debug("soft reset detected.\n");
+		printk(BIOS_DEBUG, "soft reset detected.\n");
 		boot_mode = 1;
 	}
 
@@ -265,17 +265,17 @@ void real_main(unsigned long bist)
 
         /* Read PM1_CNT */
 	reg32 = inl(DEFAULT_PMBASE + 0x04);
-	printk_debug("PM1_CNT: %08x\n", reg32);
+	printk(BIOS_DEBUG, "PM1_CNT: %08x\n", reg32);
 	if (((reg32 >> 10) & 7) == 5) {
 #if CONFIG_HAVE_ACPI_RESUME
-		printk_debug("Resume from S3 detected.\n");
+		printk(BIOS_DEBUG, "Resume from S3 detected.\n");
 		boot_mode = 2;
 		/* Clear SLP_TYPE. This will break stage2 but
 		 * we care for that when we get there.
 		 */
 		outl(reg32 & ~(7 << 10), DEFAULT_PMBASE + 0x04);
 #else
-		printk_debug("Resume from S3 detected, but disabled.\n");
+		printk(BIOS_DEBUG, "Resume from S3 detected, but disabled.\n");
 #endif
 	}
 
@@ -312,7 +312,7 @@ void real_main(unsigned long bist)
 		/* This will not work if TSEG is in place! */
 		u32 tom = pci_read_config32(PCI_DEV(0,2,0), 0x5c);
 
-		printk_debug("TOM: 0x%08x\n", tom);
+		printk(BIOS_DEBUG, "TOM: 0x%08x\n", tom);
 		ram_check(0x00000000, 0x000a0000);
 		//ram_check(0x00100000, tom);
 	}
diff --git a/src/mainboard/intel/d945gclf/rtl8168.c b/src/mainboard/intel/d945gclf/rtl8168.c
index 18f41fe32a..e278bcfb4e 100644
--- a/src/mainboard/intel/d945gclf/rtl8168.c
+++ b/src/mainboard/intel/d945gclf/rtl8168.c
@@ -27,7 +27,7 @@
 
 static void nic_init(struct device *dev)
 {
-	printk_debug("Initializing RTL8168 Gigabit Ethernet\n");
+	printk(BIOS_DEBUG, "Initializing RTL8168 Gigabit Ethernet\n");
 	// Nothing to do yet, but this has to be here to keep 
 	// coreboot from trying to execute an option ROM.
 }