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| author | Arthur Heymans <arthur@aheymans.xyz> | 2019-02-06 13:47:58 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-02-08 11:01:21 +0000 |
| commit | 667108199a04972ebd83c8a0430f2dddd6009879 (patch) | |
| tree | fecdb7e0a6ab66b7f9bcf9074078fbbc4a78dd8f /src/mainboard/intel/dcp847ske | |
| parent | a1024ac933e74fa2c607e991be4ee705215f563d (diff) | |
| download | coreboot-667108199a04972ebd83c8a0430f2dddd6009879.tar.xz | |
cpu/intel/model_1067x: Check for lock bit on IA32_FEATURE_CONTROL
df7aecd "cpu/intel: Configure IA32_FEATURE_CONTROL for alternative
SMRR" introduced a regression because it unconditionally writes to
IA32_FEATURE_CONTROL, which if it is already locked results in an
unhandled exception. The lock bit is already set on a system reboot.
Change-Id: I7d2df9e1b9d767809da7a61ccd877c6c40f132eb
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/31255
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Bill XIE <persmule@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/intel/dcp847ske')
0 files changed, 0 insertions, 0 deletions