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authorNico Huber <nico.h@gmx.de>2019-11-17 02:58:00 +0100
committerPatrick Georgi <pgeorgi@google.com>2019-11-18 11:52:24 +0000
commit47bf4986815407393c1cf02922c882ed0f336bb2 (patch)
tree210fdf4d4a0bafdc5aed1356a40f1f42c6293df9 /src/mainboard/intel/dcp847ske
parent6760e0bdcd37e904c121800652cd2ac3920d9cd9 (diff)
downloadcoreboot-47bf4986815407393c1cf02922c882ed0f336bb2.tar.xz
nb/intel/sandybridge/mrc: Handle P2P disabling via devicetree
Some Sandy Bridge boards disabled the PCI-to-PCI bridge early to avoid probing by the MRC. We can do that for all boards instead, based on the devicetree setting. Change-Id: Ie64774628fde77db2a379bdba6a921a31e52fa0d Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36903 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/mainboard/intel/dcp847ske')
-rw-r--r--src/mainboard/intel/dcp847ske/early_southbridge.c3
1 files changed, 0 insertions, 3 deletions
diff --git a/src/mainboard/intel/dcp847ske/early_southbridge.c b/src/mainboard/intel/dcp847ske/early_southbridge.c
index 34310a0094..9cdcd5dec2 100644
--- a/src/mainboard/intel/dcp847ske/early_southbridge.c
+++ b/src/mainboard/intel/dcp847ske/early_southbridge.c
@@ -30,9 +30,6 @@
void mainboard_late_rcba_config(void)
{
- /* Disable devices */
- RCBA32(FD) |= PCH_DISABLE_P2P;
-
/* Set "mobile" bit in MCH (which makes sense layout-wise). */
/* Note sure if this has any effect at all though. */
MCHBAR32(0x0004) |= 0x00001000;