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author | Timothy Pearson <tpearson@raptorengineeringinc.com> | 2015-11-03 19:02:26 -0600 |
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committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2015-11-05 02:17:51 +0100 |
commit | 5a1f3370ea61ef13e7f5ef703e39ed8a71f69700 (patch) | |
tree | 0800fe9411b5d7384a9c47c051db5979377d6245 /src/mainboard/intel/eagleheights/cmos.layout | |
parent | 91ba80dd798ba09a06282196bcd0bc5e40ec4504 (diff) | |
download | coreboot-5a1f3370ea61ef13e7f5ef703e39ed8a71f69700.tar.xz |
src/amd: Increase maximum blootblock execution count
Most AMD hardware requires at minimum two warm resets
when booting from S5 (power off). This is uncomfortably
close to the maximum bootblock execution count, and has resulted
in unstable normal/fallback operation on some machines.
Increase the default max bootblock execution count before fallback
to 6. This translates to roughly 2 - 3 failed boots before fallback
mode will engage, with an absolute worst case of pushing the reset
button 5 times to engage fallback mode in the absence of a dedicated
recovery jumper.
Change-Id: I1911f1b77f168835b516e6a915d5b6949f47219a
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: http://review.coreboot.org/12317
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/intel/eagleheights/cmos.layout')
0 files changed, 0 insertions, 0 deletions