summaryrefslogtreecommitdiff
path: root/src/mainboard/intel/eagleheights
diff options
context:
space:
mode:
authorStefan Reinauer <stepan@coresystems.de>2010-03-29 22:08:01 +0000
committerStefan Reinauer <stepan@openbios.org>2010-03-29 22:08:01 +0000
commit798ef2893c44ce3194c539c8c5db33d11e8edbac (patch)
tree405318f804b41070e16ca6b907d65a1e27cc5071 /src/mainboard/intel/eagleheights
parent72bdfeb6987f9578ac7fee3f21140ab5853d6179 (diff)
downloadcoreboot-798ef2893c44ce3194c539c8c5db33d11e8edbac.tar.xz
This drops the ASSEMBLY define from romstage.c, too
(since it's not assembly code, this was a dirty hack anyways) Also run awk 1 RS= ORS="\n\n" < $FILE > $FILE.nonewlines mv $FILE.nonewlines $FILE on romstage.c because my perl -pi -e 's,#define ASSEMBLY 1,,g' */*/romstage.c cut some holes into the source. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5320 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/intel/eagleheights')
-rw-r--r--src/mainboard/intel/eagleheights/romstage.c3
1 files changed, 1 insertions, 2 deletions
diff --git a/src/mainboard/intel/eagleheights/romstage.c b/src/mainboard/intel/eagleheights/romstage.c
index 6d3673689a..7eb83c9153 100644
--- a/src/mainboard/intel/eagleheights/romstage.c
+++ b/src/mainboard/intel/eagleheights/romstage.c
@@ -20,8 +20,6 @@
* MA 02110-1301 USA
*/
-
-
#include <delay.h>
#include <stdint.h>
@@ -236,3 +234,4 @@ void real_main(unsigned long bist)
/* Use Intel Core (not Core 2) code for CAR init, any CPU might be used. */
#include "cpu/intel/model_6ex/cache_as_ram_disable.c"
+