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authorEdward O'Callaghan <eocallaghan@alterapraxis.com>2014-06-02 07:58:14 +1000
committerKyösti Mälkki <kyosti.malkki@gmail.com>2014-06-03 09:37:57 +0200
commitfdceb48b3623f8d342c9138feb8ee0db61a79f24 (patch)
tree441eaaf1b64d13ed6f7eea4fd58a2b8761514c60 /src/mainboard/intel/eagleheights
parent8f45761a67347050058537f6a6cd75489af6c1d8 (diff)
downloadcoreboot-fdceb48b3623f8d342c9138feb8ee0db61a79f24.tar.xz
superio/smsc/smscsuperio: Make romstage linkable with header
Rewrite smsc/smscsuperio romstage component to be more consistent and provide header there-by removing #include's of early_serial.c's in mainboard's. Change-Id: I572e0c76422f09d4de88935a36c0a59e5350e6e0 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/5915 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/mainboard/intel/eagleheights')
-rw-r--r--src/mainboard/intel/eagleheights/romstage.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/intel/eagleheights/romstage.c b/src/mainboard/intel/eagleheights/romstage.c
index 3aeb71c242..249fda44d5 100644
--- a/src/mainboard/intel/eagleheights/romstage.c
+++ b/src/mainboard/intel/eagleheights/romstage.c
@@ -34,7 +34,7 @@
#include "southbridge/intel/i3100/early_lpc.c"
#include "southbridge/intel/i3100/reset.c"
#include "superio/intel/i3100/early_serial.c"
-#include "superio/smsc/smscsuperio/early_serial.c"
+#include <superio/smsc/smscsuperio/smscsuperio.h>
#include "northbridge/intel/i3100/i3100.h"
#include "southbridge/intel/i3100/i3100.h"