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| author | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2012-04-27 23:16:30 +0200 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2012-04-30 23:08:06 +0200 |
| commit | 6651da3bcd51ad6ea918c21564eb505b76c8c7aa (patch) | |
| tree | 7a10210115d4e600f7f6c16ddd6c61395acf8efb /src/mainboard/intel/emeraldlake2/Makefile.inc | |
| parent | c31384e62c98baf2fb847d55bb31a82f492ce265 (diff) | |
| download | coreboot-6651da3bcd51ad6ea918c21564eb505b76c8c7aa.tar.xz | |
Add support for Intel Emerald Lake 2 CRB
This adds support for Intel's Emerald Lake 2 board.
Change-Id: Ifaeeac9d52fe655324ee29df5f7187b89b35f73a
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/951
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/mainboard/intel/emeraldlake2/Makefile.inc')
| -rw-r--r-- | src/mainboard/intel/emeraldlake2/Makefile.inc | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/src/mainboard/intel/emeraldlake2/Makefile.inc b/src/mainboard/intel/emeraldlake2/Makefile.inc new file mode 100644 index 0000000000..80385d6892 --- /dev/null +++ b/src/mainboard/intel/emeraldlake2/Makefile.inc @@ -0,0 +1,23 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2011 The ChromiumOS Authors. All rights reserved. +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; version 2 of the License. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + +romstage-$(CONFIG_CHROMEOS) += chromeos.c +ramstage-$(CONFIG_CHROMEOS) += chromeos.c + +smm-$(CONFIG_HAVE_SMI_HANDLER) += mainboard_smi.c |