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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-06-16 09:14:49 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-06-20 19:51:16 +0200 |
| commit | 6722f8da400ccb5553afe745ff71475c50d60f52 (patch) | |
| tree | fba2fe5f2ec1ae7d3ab2b9b8df1ed21b0971798e /src/mainboard/intel/emeraldlake2 | |
| parent | bb805e156a6c464454ff1622a638e8ab768732bd (diff) | |
| download | coreboot-6722f8da400ccb5553afe745ff71475c50d60f52.tar.xz | |
sandy/ivy boards: Use acpi_s3_resume_allowed()
Change-Id: I8e0d43293e095c1c76c3cfef1f426737624ea37f
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/6063
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
Diffstat (limited to 'src/mainboard/intel/emeraldlake2')
| -rw-r--r-- | src/mainboard/intel/emeraldlake2/romstage.c | 21 |
1 files changed, 11 insertions, 10 deletions
diff --git a/src/mainboard/intel/emeraldlake2/romstage.c b/src/mainboard/intel/emeraldlake2/romstage.c index a7ab4820a4..5597a2d496 100644 --- a/src/mainboard/intel/emeraldlake2/romstage.c +++ b/src/mainboard/intel/emeraldlake2/romstage.c @@ -27,6 +27,7 @@ #include <device/pnp_def.h> #include <cpu/x86/lapic.h> #include <pc80/mc146818rtc.h> +#include <arch/acpi.h> #include <cbmem.h> #include <console/console.h> #include "superio/smsc/sio1007/chip.h" @@ -255,16 +256,16 @@ void main(unsigned long bist) pm1_cnt = inl(DEFAULT_PMBASE + PM1_CNT); if ((pm1_sts & WAK_STS) && ((pm1_cnt >> 10) & 7) == 5) { -#if CONFIG_HAVE_ACPI_RESUME - printk(BIOS_DEBUG, "Resume from S3 detected.\n"); - boot_mode = 2; - /* Clear SLP_TYPE. This will break stage2 but - * we care for that when we get there. - */ - outl(pm1_cnt & ~(7 << 10), DEFAULT_PMBASE + PM1_CNT); -#else - printk(BIOS_DEBUG, "Resume from S3 detected, but disabled.\n"); -#endif + if (acpi_s3_resume_allowed()) { + printk(BIOS_DEBUG, "Resume from S3 detected.\n"); + boot_mode = 2; + /* Clear SLP_TYPE. This will break stage2 but + * we care for that when we get there. + */ + outl(pm1_cnt & ~(7 << 10), DEFAULT_PMBASE + PM1_CNT); + } else { + printk(BIOS_DEBUG, "Resume from S3 detected, but disabled.\n"); + } } post_code(0x38); |