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| author | Elyes HAOUAS <ehaouas@noos.fr> | 2018-08-11 13:19:23 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-08-13 15:36:43 +0000 |
| commit | 2527648d8c258581bc1c32576d248f15a13b48dd (patch) | |
| tree | f43200fb01a6d07ed6d96d24aca290f9c048d1ae /src/mainboard/intel/emeraldlake2 | |
| parent | e308cc6186e9768252d1e475624edd2426d7aac0 (diff) | |
| download | coreboot-2527648d8c258581bc1c32576d248f15a13b48dd.tar.xz | |
src/mb: Remove some unneeded includes
Change-Id: I3108193c0e0b644cecb74ae0c7a7b54e24a75b58
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/28049
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/mainboard/intel/emeraldlake2')
| -rw-r--r-- | src/mainboard/intel/emeraldlake2/mainboard.c | 3 | ||||
| -rw-r--r-- | src/mainboard/intel/emeraldlake2/romstage.c | 3 |
2 files changed, 0 insertions, 6 deletions
diff --git a/src/mainboard/intel/emeraldlake2/mainboard.c b/src/mainboard/intel/emeraldlake2/mainboard.c index 7ea1c5119d..d5a43567b2 100644 --- a/src/mainboard/intel/emeraldlake2/mainboard.c +++ b/src/mainboard/intel/emeraldlake2/mainboard.c @@ -17,12 +17,9 @@ #include <types.h> #include <string.h> #include <device/device.h> -#include <device/device.h> #include <device/pci_def.h> #include <device/pci_ops.h> -#include <console/console.h> #include <drivers/intel/gma/int15.h> -#include <pc80/mc146818rtc.h> #include <arch/acpi.h> #include <arch/io.h> #include <arch/interrupt.h> diff --git a/src/mainboard/intel/emeraldlake2/romstage.c b/src/mainboard/intel/emeraldlake2/romstage.c index fcb2b2cc27..a672294ae0 100644 --- a/src/mainboard/intel/emeraldlake2/romstage.c +++ b/src/mainboard/intel/emeraldlake2/romstage.c @@ -22,9 +22,7 @@ #include <device/pci_def.h> #include <device/pnp_def.h> #include <cpu/x86/lapic.h> -#include <pc80/mc146818rtc.h> #include <arch/acpi.h> -#include <console/console.h> #include <superio/smsc/sio1007/chip.h> #include <northbridge/intel/sandybridge/sandybridge.h> #include <northbridge/intel/sandybridge/raminit.h> @@ -32,7 +30,6 @@ #include <southbridge/intel/bd82x6x/pch.h> #include <southbridge/intel/common/gpio.h> #include <arch/cpu.h> -#include <cpu/x86/msr.h> #include <halt.h> #define SIO_PORT 0x164e |