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authorArthur Heymans <arthur@aheymans.xyz>2018-11-28 12:13:54 +0100
committerDuncan Laurie <dlaurie@chromium.org>2018-11-30 21:52:10 +0000
commit04008a9c14c086c6a2e9f7ba89c3363713d90689 (patch)
tree48cee8496559c91dd0e4085d891cc278640393ff /src/mainboard/intel/emeraldlake2
parentc54d14f5b45af0f64826c0a09eed3ab5740780ef (diff)
downloadcoreboot-04008a9c14c086c6a2e9f7ba89c3363713d90689.tar.xz
cpu/intel/model_206{5,a}x: Rework acpi/cpu.asl
Use acpigen_write_processor_cnot to implement notifications to the CPU. Automatically generate \PPKG in SSDT. Change-Id: Iecc54e94484f5f11e0ba8ef6d1d844276e484b4d Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/29886 Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/intel/emeraldlake2')
-rw-r--r--src/mainboard/intel/emeraldlake2/acpi/thermal.asl2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mainboard/intel/emeraldlake2/acpi/thermal.asl b/src/mainboard/intel/emeraldlake2/acpi/thermal.asl
index b3d3824eb6..c3ec240ecf 100644
--- a/src/mainboard/intel/emeraldlake2/acpi/thermal.asl
+++ b/src/mainboard/intel/emeraldlake2/acpi/thermal.asl
@@ -15,6 +15,8 @@
// Thermal Zone
+External (\PPKG, MethodObj)
+
#define HAVE_THERMALZONE
Scope (\_TZ)
{