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authorLee Leahy <leroy.p.leahy@intel.com>2016-02-16 08:26:03 -0800
committerLeroy P Leahy <leroy.p.leahy@intel.com>2016-02-17 18:45:50 +0100
commit18452628b3c84f6bb8e58fb30dbee2bd14bf2873 (patch)
tree6ee139bc186b5fe71b7f662f06400c775e249387 /src/mainboard/intel/galileo/devicetree.cb
parent7fcaf77c2ddb622a1a15c6d49d2f7a550ae6bd6e (diff)
downloadcoreboot-18452628b3c84f6bb8e58fb30dbee2bd14bf2873.tar.xz
mainboard/intel/galileo: Enable PCIe root port 0
Enable PCIe root port 0 Testing on Galileo: * Add a 802.11 wireless card in the mini-PCIe slot * Edit the src/mainboard/intel/galileo/Makefile.inc file * Add "select ADD_FSP_PDAT_FILE" * Add "select ADD_FSP_RAW_BIN" * Add "select ADD_RMU_FILE" * Place the FSP.bin file in the location specified by CONFIG_FSP_FILE * Place the pdat.bin files in the location specified by CONFIG_FSP_PDAT_FILE * Place the rmu.bin file in the location specified by CONFIG_RMU_FILE * Testing successful if: * After PCI 00:17.0, memory addresses are assigned to the 802.11 wireless card on PCI 01:00.0 during BS_DEV_RESOURCES state Change-Id: I68ea25b8e594480fe5146ffad75e293e346e9517 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-on: https://review.coreboot.org/13723 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/mainboard/intel/galileo/devicetree.cb')
-rw-r--r--src/mainboard/intel/galileo/devicetree.cb2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/intel/galileo/devicetree.cb b/src/mainboard/intel/galileo/devicetree.cb
index debecc10e1..1d3c7dd19e 100644
--- a/src/mainboard/intel/galileo/devicetree.cb
+++ b/src/mainboard/intel/galileo/devicetree.cb
@@ -30,7 +30,7 @@ chip soc/intel/quark
device pci 15.0 off end # 8086 0935 - SPI controller 0
device pci 15.1 off end # 8086 0935 - SPI controller 1
device pci 15.2 off end # 8086 0934 - I2C/GPIO controller
- device pci 17.0 off end # 8086 11C3 - PCIe Root Port 0
+ device pci 17.0 on end # 8086 11C3 - PCIe Root Port 0
device pci 17.1 off end # 8086 11C4 - PCIe Root Port 1
device pci 1f.0 on end # 8086 095E - Legacy Bridge
end