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| author | Lee Leahy <leroy.p.leahy@intel.com> | 2016-05-30 15:01:06 -0700 |
|---|---|---|
| committer | Leroy P Leahy <leroy.p.leahy@intel.com> | 2016-05-31 22:11:51 +0200 |
| commit | bc518d5cab4234a0d0d06a7d3829bbca9e318ba6 (patch) | |
| tree | 09eb5cf6c3476c17ca34fde7164d14c2f2ec3b0b /src/mainboard/intel/galileo/gpio.c | |
| parent | ac78db3a53a7653a73409936455d68c754291e9d (diff) | |
| download | coreboot-bc518d5cab4234a0d0d06a7d3829bbca9e318ba6.tar.xz | |
quark: Enable HSUART0 as console
The use of HSUART0 on galileo requires early initialization of the I2C
GPIO expanders to direct the RXD and TXD signals to DIGITAL 0 and 1
on the expansion connector.
TEST=None
Change-Id: I11195d79e954c1f6bc91eafe257d7ddc1310b2e7
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/15010
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/mainboard/intel/galileo/gpio.c')
| -rw-r--r-- | src/mainboard/intel/galileo/gpio.c | 38 |
1 files changed, 25 insertions, 13 deletions
diff --git a/src/mainboard/intel/galileo/gpio.c b/src/mainboard/intel/galileo/gpio.c index 31843814c2..0b55bc6ae2 100644 --- a/src/mainboard/intel/galileo/gpio.c +++ b/src/mainboard/intel/galileo/gpio.c @@ -15,11 +15,35 @@ #include <arch/io.h> #include <console/console.h> +#include <fsp/romstage.h> #include <soc/ramstage.h> #include "reg_access.h" #include "gen1.h" #include "gen2.h" +void car_mainboard_pre_console_init(void) +{ + const struct reg_script *script; + + /* Initialize the GPIO controllers */ + if (IS_ENABLED(CONFIG_GALILEO_GEN2)) + script = gen2_gpio_init; + else + script = gen1_gpio_init; + reg_script_run(script); + + /* Initialize the RXD and TXD paths for UART0 */ + if (IS_ENABLED(CONFIG_ENABLE_BUILTIN_HSUART0)) { + if (IS_ENABLED(CONFIG_GALILEO_GEN2)) + script = gen2_hsuart0; + else + script = (reg_legacy_gpio_read (R_QNC_GPIO_RGLVL_RESUME_WELL) + & GALILEO_DETERMINE_IOEXP_SLA_RESUMEWELL_GPIO) + ? gen1_hsuart0_0x21 : gen1_hsuart0_0x20; + reg_script_run(script); + } +} + void mainboard_gpio_i2c_init(device_t dev) { const struct reg_script *script; @@ -33,24 +57,12 @@ void mainboard_gpio_i2c_init(device_t dev) /* Determine which I2C address is in use */ script = (reg_legacy_gpio_read (R_QNC_GPIO_RGLVL_RESUME_WELL) & GALILEO_DETERMINE_IOEXP_SLA_RESUMEWELL_GPIO) - ? gen1_i2c_0x20_init : gen1_i2c_0x21_init; + ? gen1_i2c_0x21_init : gen1_i2c_0x20_init; /* Initialize the I2C chips */ reg_script_run(script); } -void mainboard_gpio_init(void) -{ - const struct reg_script *script; - - /* Initialize the GPIO controllers */ - if (IS_ENABLED(CONFIG_GALILEO_GEN2)) - script = gen2_gpio_init; - else - script = gen1_gpio_init; - reg_script_run(script); -} - void mainboard_gpio_pcie_reset(uint32_t pin_value) { uint32_t pin_number; |