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authorAaron Durbin <adurbin@chromium.org>2018-04-21 14:45:32 -0600
committerAaron Durbin <adurbin@chromium.org>2018-04-24 14:37:59 +0000
commit6403167d290da235a732bd2d6157aa2124fb403a (patch)
tree9c4805af37a31830934f91098d299e967df930c6 /src/mainboard/intel/glkrvp
parent38fd6685e9da61daadc96a8d537e6966dfe3b219 (diff)
downloadcoreboot-6403167d290da235a732bd2d6157aa2124fb403a.tar.xz
compiler.h: add __weak macro
Instead of writing out '__attribute__((weak))' use a shorter form. Change-Id: If418a1d55052780077febd2d8f2089021f414b91 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/25767 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Justin TerAvest <teravest@chromium.org>
Diffstat (limited to 'src/mainboard/intel/glkrvp')
-rw-r--r--src/mainboard/intel/glkrvp/chromeos.c3
-rw-r--r--src/mainboard/intel/glkrvp/variants/baseboard/boardid.c3
-rw-r--r--src/mainboard/intel/glkrvp/variants/baseboard/gpio.c9
-rw-r--r--src/mainboard/intel/glkrvp/variants/baseboard/memory.c5
-rw-r--r--src/mainboard/intel/glkrvp/variants/baseboard/nhlt.c3
5 files changed, 14 insertions, 9 deletions
diff --git a/src/mainboard/intel/glkrvp/chromeos.c b/src/mainboard/intel/glkrvp/chromeos.c
index 05e8c6017a..76c83e1151 100644
--- a/src/mainboard/intel/glkrvp/chromeos.c
+++ b/src/mainboard/intel/glkrvp/chromeos.c
@@ -15,6 +15,7 @@
#include <baseboard/variants.h>
#include <boot/coreboot_tables.h>
+#include <compiler.h>
#include <ec/google/chromeec/ec.h>
#include <gpio.h>
#include <vendorcode/google/chromeos/chromeos.h>
@@ -55,7 +56,7 @@ void mainboard_chromeos_acpi_generate(void)
chromeos_acpi_gpio_generate(gpios, num);
}
-int __attribute__((weak)) get_lid_switch(void)
+int __weak get_lid_switch(void)
{
return -1;
}
diff --git a/src/mainboard/intel/glkrvp/variants/baseboard/boardid.c b/src/mainboard/intel/glkrvp/variants/baseboard/boardid.c
index 1f30f4ea63..530c06a993 100644
--- a/src/mainboard/intel/glkrvp/variants/baseboard/boardid.c
+++ b/src/mainboard/intel/glkrvp/variants/baseboard/boardid.c
@@ -14,9 +14,10 @@
*/
#include <baseboard/variants.h>
+#include <compiler.h>
#include <ec/google/chromeec/ec.h>
-uint8_t __attribute__((weak)) variant_board_id(void)
+uint8_t __weak variant_board_id(void)
{
if (IS_ENABLED(CONFIG_EC_GOOGLE_CHROMEEC))
return google_chromeec_get_board_version();
diff --git a/src/mainboard/intel/glkrvp/variants/baseboard/gpio.c b/src/mainboard/intel/glkrvp/variants/baseboard/gpio.c
index 96821d6704..7ff68a4826 100644
--- a/src/mainboard/intel/glkrvp/variants/baseboard/gpio.c
+++ b/src/mainboard/intel/glkrvp/variants/baseboard/gpio.c
@@ -16,6 +16,7 @@
#include <baseboard/gpio.h>
#include <baseboard/variants.h>
#include <commonlib/helpers.h>
+#include <compiler.h>
/*
* Pad configuration in ramstage. The order largely follows the 'GPIO Muxing'
@@ -250,7 +251,7 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_NF_IOSSTATE(GPIO_209, DN_20K, DEEP, NF1, HIZCRx0),/*EMMC0_STROBE*/
};
-const struct pad_config * __attribute__((weak)) variant_gpio_table(size_t *num)
+const struct pad_config * __weak variant_gpio_table(size_t *num)
{
*num = ARRAY_SIZE(gpio_table);
return gpio_table;
@@ -262,7 +263,7 @@ static const struct pad_config early_gpio_table[] = {
PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_178, UP_20K, DEEP, NF1), /* SMB_DATA */
};
-const struct pad_config * __attribute__((weak))
+const struct pad_config * __weak
variant_early_gpio_table(size_t *num)
{
*num = ARRAY_SIZE(early_gpio_table);
@@ -277,7 +278,7 @@ static const struct pad_config sleep_gpio_table[] = {
#endif
};
-const struct pad_config * __attribute__((weak))
+const struct pad_config * __weak
variant_sleep_gpio_table(size_t *num)
{
*num = ARRAY_SIZE(sleep_gpio_table);
@@ -291,7 +292,7 @@ static const struct cros_gpio cros_gpios[] = {
#endif
};
-const struct cros_gpio * __attribute__((weak)) variant_cros_gpios(size_t *num)
+const struct cros_gpio * __weak variant_cros_gpios(size_t *num)
{
*num = ARRAY_SIZE(cros_gpios);
return cros_gpios;
diff --git a/src/mainboard/intel/glkrvp/variants/baseboard/memory.c b/src/mainboard/intel/glkrvp/variants/baseboard/memory.c
index be00ecd577..56fac2a068 100644
--- a/src/mainboard/intel/glkrvp/variants/baseboard/memory.c
+++ b/src/mainboard/intel/glkrvp/variants/baseboard/memory.c
@@ -14,6 +14,7 @@
*/
#include <baseboard/variants.h>
+#include <compiler.h>
#include <gpio.h>
#include <soc/meminit.h>
#include <variant/gpio.h>
@@ -133,12 +134,12 @@ static const struct lpddr4_cfg lp4cfg = {
.swizzle_config = &baseboard_lpddr4_swizzle,
};
-const struct lpddr4_cfg * __attribute__((weak)) variant_lpddr4_config(void)
+const struct lpddr4_cfg * __weak variant_lpddr4_config(void)
{
return &lp4cfg;
}
-size_t __attribute__((weak)) variant_memory_sku(void)
+size_t __weak variant_memory_sku(void)
{
return 0;
}
diff --git a/src/mainboard/intel/glkrvp/variants/baseboard/nhlt.c b/src/mainboard/intel/glkrvp/variants/baseboard/nhlt.c
index 45cbc8f8c2..51da3addb5 100644
--- a/src/mainboard/intel/glkrvp/variants/baseboard/nhlt.c
+++ b/src/mainboard/intel/glkrvp/variants/baseboard/nhlt.c
@@ -14,11 +14,12 @@
*/
#include <baseboard/variants.h>
+#include <compiler.h>
#include <console/console.h>
#include <nhlt.h>
#include <soc/nhlt.h>
-void __attribute__((weak)) variant_nhlt_init(struct nhlt *nhlt)
+void __weak variant_nhlt_init(struct nhlt *nhlt)
{
/* 1-dmic configuration */
if (IS_ENABLED(CONFIG_NHLT_DMIC_1CH_16B) &&