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author | Julien Viard de Galbert <jviarddegalbert@online.net> | 2017-11-06 13:16:30 +0100 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2017-11-07 12:33:18 +0000 |
commit | 66c210ae3790feb11e89e2d6353f1ce26966d5b9 (patch) | |
tree | 5f52f455c3d7fc94b67bd03bcef18fba51845f1a /src/mainboard/intel/harcuvar | |
parent | f528195bdf141e84d3121411d2cbe32f5938dd72 (diff) | |
download | coreboot-66c210ae3790feb11e89e2d6353f1ce26966d5b9.tar.xz |
mainboard/intel/harcuvar: update to set the HSIO lines configuration
Change-Id: Ifc3423ff983fb631edcab087d04742937b25ef86
Signed-off-by: Julien Viard de Galbert <jviarddegalbert@online.net>
Reviewed-on: https://review.coreboot.org/22310
Reviewed-by: FEI WANG <wangfei.jimei@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/intel/harcuvar')
-rw-r--r-- | src/mainboard/intel/harcuvar/Makefile.inc | 3 | ||||
-rw-r--r-- | src/mainboard/intel/harcuvar/hsio.c | 36 |
2 files changed, 39 insertions, 0 deletions
diff --git a/src/mainboard/intel/harcuvar/Makefile.inc b/src/mainboard/intel/harcuvar/Makefile.inc index ba88569c8a..d100688fe0 100644 --- a/src/mainboard/intel/harcuvar/Makefile.inc +++ b/src/mainboard/intel/harcuvar/Makefile.inc @@ -2,6 +2,7 @@ ## This file is part of the coreboot project. ## ## Copyright (C) 2014 - 2017 Intel Corporation. +## Copyright (C) 2017 Online SAS. ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by @@ -16,9 +17,11 @@ subdirs-$(CONFIG_ENABLE_FSP_MEMORY_DOWN) += spd romstage-y += boardid.c +romstage-y += hsio.c ramstage-y += ramstage.c ramstage-y += boardid.c +ramstage-y += hsio.c ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpi_tables.c ramstage-$(CONFIG_HAVE_ACPI_TABLES) += fadt.c diff --git a/src/mainboard/intel/harcuvar/hsio.c b/src/mainboard/intel/harcuvar/hsio.c new file mode 100644 index 0000000000..fa17130075 --- /dev/null +++ b/src/mainboard/intel/harcuvar/hsio.c @@ -0,0 +1,36 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2017 Intel Corporation. + * Copyright (C) 2017 Online SAS. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <harcuvar_boardid.h> +#include <hsio.h> +#include <soc/fiamux.h> + +size_t mainboard_get_hsio_config(BL_HSIO_INFORMATION **p_hsio_config) +{ + uint8_t boardid = board_id(); + size_t num; + switch (boardid) { + case BoardIdHarcuvar: + num = ARRAY_SIZE(harcuvar_hsio_config); + (*p_hsio_config) = (BL_HSIO_INFORMATION *)harcuvar_hsio_config; + break; + default: + num = 0; + (*p_hsio_config) = NULL; + break; + } + return num; +} |