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authorStefan Reinauer <stepan@coresystems.de>2010-04-27 06:56:47 +0000
committerStefan Reinauer <stepan@openbios.org>2010-04-27 06:56:47 +0000
commit14e22779625de673569c7b950ecc2753fb915b31 (patch)
tree14a6ed759e116e9e6e9bbd7f499b74b96d6cc072 /src/mainboard/intel/jarrell/devicetree.cb
parent0e1e8065e303030c39c3f2c27e5d32ee58a16c66 (diff)
downloadcoreboot-14e22779625de673569c7b950ecc2753fb915b31.tar.xz
Since some people disapprove of white space cleanups mixed in regular commits
while others dislike them being extra commits, let's clean them up once and for all for the existing code. If it's ugly, let it only be ugly once :-) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5507 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/intel/jarrell/devicetree.cb')
-rw-r--r--src/mainboard/intel/jarrell/devicetree.cb8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/mainboard/intel/jarrell/devicetree.cb b/src/mainboard/intel/jarrell/devicetree.cb
index 32f70e3e85..3a40899b29 100644
--- a/src/mainboard/intel/jarrell/devicetree.cb
+++ b/src/mainboard/intel/jarrell/devicetree.cb
@@ -1,9 +1,9 @@
chip northbridge/intel/e7520
- device pci_domain 0 on
+ device pci_domain 0 on
device pci 00.0 on end
device pci 00.1 on end
device pci 01.0 on end
- device pci 02.0 on
+ device pci 02.0 on
chip southbridge/intel/pxhd # pxhd1
device pci 00.0 on end
device pci 00.1 on end
@@ -28,7 +28,7 @@ chip northbridge/intel/e7520
device pci 0c.0 on end
end
end
- device pci 1f.0 on
+ device pci 1f.0 on
chip superio/nsc/pc87427
device pnp 2e.0 off end
device pnp 2e.2 on
@@ -60,7 +60,7 @@ chip northbridge/intel/e7520
end
device pci 1f.1 on end
device pci 1f.2 off end
- device pci 1f.3 on end
+ device pci 1f.3 on end
device pci 1f.5 off end
device pci 1f.6 off end
register "gpio[40]" = "ICH5R_GPIO_USE_AS_GPIO"