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| author | Stefan Reinauer <stepan@coresystems.de> | 2010-03-31 14:47:43 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2010-03-31 14:47:43 +0000 |
| commit | 64ed2b73451de4b655b3fdda0ff42825a165c317 (patch) | |
| tree | 0faaae313a9a9edbf8b33f56fc18830ba14aa75f /src/mainboard/intel/jarrell/jarrell_fixups.c | |
| parent | 5a1f5970857a5ad1fda0cf9d5945192408bf537b (diff) | |
| download | coreboot-64ed2b73451de4b655b3fdda0ff42825a165c317.tar.xz | |
Drop \r\n and \n\r as both print_XXX and printk now do this internally.
Only some assembler files still have \r\n ... Can we move that part to C
completely?
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5342 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/intel/jarrell/jarrell_fixups.c')
| -rw-r--r-- | src/mainboard/intel/jarrell/jarrell_fixups.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/intel/jarrell/jarrell_fixups.c b/src/mainboard/intel/jarrell/jarrell_fixups.c index d8c694b4af..fb00984b7e 100644 --- a/src/mainboard/intel/jarrell/jarrell_fixups.c +++ b/src/mainboard/intel/jarrell/jarrell_fixups.c @@ -58,12 +58,12 @@ static void mainboard_set_e7520_pll(unsigned bits) /* set gpio 42,44 signal levels */ data = inb(gpio_index + PC87427_GPDO_4); if ((data & 0x14) == (0xff & (((bits&2)?0:1)<<4 | ((bits&1)?0:1)<<2))) { - print_debug("set_pllsel: correct settings detected!\r\n"); + print_debug("set_pllsel: correct settings detected!\n"); return; /* settings already configured */ } else { outb((data & 0xeb) | ((bits&2)?0:1)<<4 | ((bits&1)?0:1)<<2, gpio_index + PC87427_GPDO_4); /* reset */ - print_debug("set_pllsel: settings adjusted, now resetting...\r\n"); + print_debug("set_pllsel: settings adjusted, now resetting...\n"); // hard_reset(); /* should activate a PCI_RST, which should reset MCH, but it doesn't seem to work ???? */ // mch_reset(); full_reset(); |