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authorStefan Reinauer <stepan@coresystems.de>2010-04-27 06:56:47 +0000
committerStefan Reinauer <stepan@openbios.org>2010-04-27 06:56:47 +0000
commit14e22779625de673569c7b950ecc2753fb915b31 (patch)
tree14a6ed759e116e9e6e9bbd7f499b74b96d6cc072 /src/mainboard/intel/jarrell
parent0e1e8065e303030c39c3f2c27e5d32ee58a16c66 (diff)
downloadcoreboot-14e22779625de673569c7b950ecc2753fb915b31.tar.xz
Since some people disapprove of white space cleanups mixed in regular commits
while others dislike them being extra commits, let's clean them up once and for all for the existing code. If it's ugly, let it only be ugly once :-) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5507 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/intel/jarrell')
-rw-r--r--src/mainboard/intel/jarrell/debug.c64
-rw-r--r--src/mainboard/intel/jarrell/devicetree.cb8
-rw-r--r--src/mainboard/intel/jarrell/jarrell_fixups.c30
-rw-r--r--src/mainboard/intel/jarrell/mptable.c6
-rw-r--r--src/mainboard/intel/jarrell/romstage.c12
-rw-r--r--src/mainboard/intel/jarrell/watchdog.c14
6 files changed, 67 insertions, 67 deletions
diff --git a/src/mainboard/intel/jarrell/debug.c b/src/mainboard/intel/jarrell/debug.c
index b4f2a185b3..87c67b5964 100644
--- a/src/mainboard/intel/jarrell/debug.c
+++ b/src/mainboard/intel/jarrell/debug.c
@@ -5,7 +5,7 @@
static void print_reg(unsigned char index)
{
unsigned char data;
-
+
outb(index, 0x2e);
data = inb(0x2f);
print_debug("0x");
@@ -15,7 +15,7 @@ static void print_reg(unsigned char index)
print_debug("\n");
return;
}
-
+
static void xbus_en(void)
{
/* select the XBUS function in the SIO */
@@ -25,7 +25,7 @@ static void xbus_en(void)
outb(0x01, 0x2f);
return;
}
-
+
static void setup_func(unsigned char func)
{
/* select the function in the SIO */
@@ -43,27 +43,27 @@ static void setup_func(unsigned char func)
print_reg(0x75);
return;
}
-
+
static void siodump(void)
{
int i;
unsigned char data;
-
+
print_debug("\n*** SERVER I/O REGISTERS ***\n");
for (i=0x10; i<=0x2d; i++) {
print_reg((unsigned char)i);
}
-#if 0
+#if 0
print_debug("\n*** XBUS REGISTERS ***\n");
setup_func(0x0f);
for (i=0xf0; i<=0xff; i++) {
print_reg((unsigned char)i);
}
-
+
print_debug("\n*** SERIAL 1 CONFIG REGISTERS ***\n");
setup_func(0x03);
print_reg(0xf0);
-
+
print_debug("\n*** SERIAL 2 CONFIG REGISTERS ***\n");
setup_func(0x02);
print_reg(0xf0);
@@ -82,13 +82,13 @@ static void siodump(void)
print_debug("\nGPDI 4: 0x");
print_debug_hex8(data);
print_debug("\n");
-
-#if 0
-
+
+#if 0
+
print_debug("\n*** WATCHDOG TIMER REGISTERS ***\n");
setup_func(0x0a);
print_reg(0xf0);
-
+
print_debug("\n*** FAN CONTROL REGISTERS ***\n");
setup_func(0x09);
print_reg(0xf0);
@@ -103,11 +103,11 @@ static void siodump(void)
print_reg(0xf7);
print_reg(0xfe);
print_reg(0xff);
-
+
print_debug("\n*** HEALTH MONITORING & CONTROL REGISTERS ***\n");
setup_func(0x14);
print_reg(0xf0);
-#endif
+#endif
return;
}
@@ -124,8 +124,8 @@ static void print_debug_pci_dev(unsigned dev)
static void print_pci_devices(void)
{
device_t dev;
- for(dev = PCI_DEV(0, 0, 0);
- dev <= PCI_DEV(0, 0x1f, 0x7);
+ for(dev = PCI_DEV(0, 0, 0);
+ dev <= PCI_DEV(0, 0x1f, 0x7);
dev += PCI_DEV(0,0,1)) {
uint32_t id;
id = pci_read_config32(dev, PCI_VENDOR_ID);
@@ -144,7 +144,7 @@ static void dump_pci_device(unsigned dev)
int i;
print_debug_pci_dev(dev);
print_debug("\n");
-
+
for(i = 0; i <= 255; i++) {
unsigned char val;
if ((i & 0x0f) == 0) {
@@ -164,19 +164,19 @@ static void dump_bar14(unsigned dev)
{
int i;
unsigned long bar;
-
+
print_debug("BAR 14 Dump\n");
-
+
bar = pci_read_config32(dev, 0x14);
for(i = 0; i <= 0x300; i+=4) {
-#if 0
+#if 0
unsigned char val;
if ((i & 0x0f) == 0) {
print_debug_hex8(i);
print_debug_char(':');
}
val = pci_read_config8(dev, i);
-#endif
+#endif
if((i%4)==0) {
print_debug("\n");
print_debug_hex16(i);
@@ -191,8 +191,8 @@ static void dump_bar14(unsigned dev)
static void dump_pci_devices(void)
{
device_t dev;
- for(dev = PCI_DEV(0, 0, 0);
- dev <= PCI_DEV(0, 0x1f, 0x7);
+ for(dev = PCI_DEV(0, 0, 0);
+ dev <= PCI_DEV(0, 0x1f, 0x7);
dev += PCI_DEV(0,0,1)) {
uint32_t id;
id = pci_read_config32(dev, PCI_VENDOR_ID);
@@ -215,8 +215,8 @@ static void dump_spd_registers(const struct mem_controller *ctrl)
device = ctrl->channel0[i];
if (device) {
int j;
- print_debug("dimm: ");
- print_debug_hex8(i);
+ print_debug("dimm: ");
+ print_debug_hex8(i);
print_debug(".0: ");
print_debug_hex8(device);
for(j = 0; j < 256; j++) {
@@ -241,8 +241,8 @@ static void dump_spd_registers(const struct mem_controller *ctrl)
device = ctrl->channel1[i];
if (device) {
int j;
- print_debug("dimm: ");
- print_debug_hex8(i);
+ print_debug("dimm: ");
+ print_debug_hex8(i);
print_debug(".1: ");
print_debug_hex8(device);
for(j = 0; j < 256; j++) {
@@ -278,7 +278,7 @@ void dump_spd_registers(void)
print_debug("\n");
print_debug("dimm ");
print_debug_hex8(device);
-
+
for(i = 0; (i < 256) ; i++) {
unsigned char byte;
if ((i % 16) == 0) {
@@ -291,7 +291,7 @@ void dump_spd_registers(void)
print_debug("bad device: ");
print_debug_hex8(-status);
print_debug("\n");
- break;
+ break;
}
print_debug_hex8(status);
print_debug_char(' ');
@@ -311,7 +311,7 @@ void dump_ipmi_registers(void)
print_debug("\n");
print_debug("ipmi ");
print_debug_hex8(device);
-
+
for(i = 0; (i < 8) ; i++) {
unsigned char byte;
status = smbus_read_byte(device, 2);
@@ -319,7 +319,7 @@ void dump_ipmi_registers(void)
print_debug("bad device: ");
print_debug_hex8(-status);
print_debug("\n");
- break;
+ break;
}
print_debug_hex8(status);
print_debug_char(' ');
@@ -327,4 +327,4 @@ void dump_ipmi_registers(void)
device += SMBUS_MEM_DEVICE_INC;
print_debug("\n");
}
-}
+}
diff --git a/src/mainboard/intel/jarrell/devicetree.cb b/src/mainboard/intel/jarrell/devicetree.cb
index 32f70e3e85..3a40899b29 100644
--- a/src/mainboard/intel/jarrell/devicetree.cb
+++ b/src/mainboard/intel/jarrell/devicetree.cb
@@ -1,9 +1,9 @@
chip northbridge/intel/e7520
- device pci_domain 0 on
+ device pci_domain 0 on
device pci 00.0 on end
device pci 00.1 on end
device pci 01.0 on end
- device pci 02.0 on
+ device pci 02.0 on
chip southbridge/intel/pxhd # pxhd1
device pci 00.0 on end
device pci 00.1 on end
@@ -28,7 +28,7 @@ chip northbridge/intel/e7520
device pci 0c.0 on end
end
end
- device pci 1f.0 on
+ device pci 1f.0 on
chip superio/nsc/pc87427
device pnp 2e.0 off end
device pnp 2e.2 on
@@ -60,7 +60,7 @@ chip northbridge/intel/e7520
end
device pci 1f.1 on end
device pci 1f.2 off end
- device pci 1f.3 on end
+ device pci 1f.3 on end
device pci 1f.5 off end
device pci 1f.6 off end
register "gpio[40]" = "ICH5R_GPIO_USE_AS_GPIO"
diff --git a/src/mainboard/intel/jarrell/jarrell_fixups.c b/src/mainboard/intel/jarrell/jarrell_fixups.c
index 7fb5a20dbb..1261e61046 100644
--- a/src/mainboard/intel/jarrell/jarrell_fixups.c
+++ b/src/mainboard/intel/jarrell/jarrell_fixups.c
@@ -21,7 +21,7 @@ static void mch_reset(void)
value = inl(base);
value |= (1 <<19);
outl(value, base);
-
+
/* Pull GPIO 19 low */
value = inl(base + 0x0c);
value &= ~(1 << 19);
@@ -38,7 +38,7 @@ static void mainboard_set_e7520_pll(unsigned bits)
/* currently only handle the Jarrell/PC87427 case */
dev = PC87427_GPIO_DEV;
-
+
pnp_set_logical_device(dev);
gpio_index = pnp_read_iobase(dev, 0x60);
@@ -66,7 +66,7 @@ static void mainboard_set_e7520_pll(unsigned bits)
// mch_reset();
full_reset();
}
- return;
+ return;
}
static void mainboard_set_e7520_leds(void)
@@ -77,7 +77,7 @@ static void mainboard_set_e7520_leds(void)
/* currently only handle the Jarrell/PC87427 case */
dev = PC87427_GPIO_DEV;
-
+
pnp_set_logical_device(dev);
/* enable */
@@ -88,17 +88,17 @@ static void mainboard_set_e7520_leds(void)
/* Set auto mode for dimm leds and post */
outb(0xf0,0x2e);
- outb(0x70,0x2f);
+ outb(0x70,0x2f);
outb(0xf4,0x2e);
- outb(0x30,0x2f);
+ outb(0x30,0x2f);
outb(0xf5,0x2e);
- outb(0x88,0x2f);
+ outb(0x88,0x2f);
outb(0xf6,0x2e);
- outb(0x00,0x2f);
+ outb(0x00,0x2f);
outb(0xf7,0x2e);
- outb(0x90,0x2f);
+ outb(0x90,0x2f);
outb(0xf8,0x2e);
- outb(0x00,0x2f);
+ outb(0x00,0x2f);
/* Turn the leds off */
outb(0x00,0x88);
@@ -106,12 +106,12 @@ static void mainboard_set_e7520_leds(void)
/* Disable the ports */
outb(0xf5,0x2e);
- outb(0x00,0x2f);
+ outb(0x00,0x2f);
outb(0xf7,0x2e);
- outb(0x00,0x2f);
+ outb(0x00,0x2f);
outb(0xf4,0x2e);
- outb(0x00,0x2f);
-
- return;
+ outb(0x00,0x2f);
+
+ return;
}
diff --git a/src/mainboard/intel/jarrell/mptable.c b/src/mainboard/intel/jarrell/mptable.c
index 73aa575540..1386c16183 100644
--- a/src/mainboard/intel/jarrell/mptable.c
+++ b/src/mainboard/intel/jarrell/mptable.c
@@ -38,7 +38,7 @@ static void *smp_write_config_table(void *v)
mc->reserved = 0;
smp_write_processors(mc);
-
+
{
device_t dev;
@@ -102,7 +102,7 @@ static void *smp_write_config_table(void *v)
}
}
}
-
+
/* define bus and isa numbers */
for(bus_num = 0; bus_num < bus_isa; bus_num++) {
smp_write_bus(mc, bus_num, "PCI ");
@@ -165,7 +165,7 @@ static void *smp_write_config_table(void *v)
}
}
}
-
+
/* ISA backward compatibility interrupts */
smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
bus_isa, 0x00, 0x08, 0x00);
diff --git a/src/mainboard/intel/jarrell/romstage.c b/src/mainboard/intel/jarrell/romstage.c
index d3f6c7a707..823519984e 100644
--- a/src/mainboard/intel/jarrell/romstage.c
+++ b/src/mainboard/intel/jarrell/romstage.c
@@ -51,8 +51,8 @@ static inline int spd_read_byte(unsigned device, unsigned address)
static void main(unsigned long bist)
{
/*
- *
- *
+ *
+ *
*/
static const struct mem_controller mch[] = {
{
@@ -117,7 +117,7 @@ static void main(unsigned long bist)
disable_watchdogs();
power_down_reset_check();
// dump_ipmi_registers();
- mainboard_set_e7520_leds();
+ mainboard_set_e7520_leds();
sdram_initialize(ARRAY_SIZE(mch), mch);
ich5_watchdog_on();
#if 0
@@ -128,7 +128,7 @@ static void main(unsigned long bist)
dump_bar14(PCI_DEV(0, 0x00, 0));
#endif
-#if 0 // temporarily disabled
+#if 0 // temporarily disabled
/* Check the first 1M */
// ram_check(0x00000000, 0x000100000);
// ram_check(0x00000000, 0x000a0000);
@@ -138,9 +138,9 @@ static void main(unsigned long bist)
#if 0
ram_check(0x00000000, 0x02000000);
#endif
-
+
#endif
-#if 0
+#if 0
while(1) {
hlt();
}
diff --git a/src/mainboard/intel/jarrell/watchdog.c b/src/mainboard/intel/jarrell/watchdog.c
index 90782d9fbf..f7c42caa78 100644
--- a/src/mainboard/intel/jarrell/watchdog.c
+++ b/src/mainboard/intel/jarrell/watchdog.c
@@ -29,17 +29,17 @@ static void disable_ich5_watchdog(void)
value = pci_read_config16(dev, 0x04);
value |= (1 << 10);
pci_write_config16(dev, 0x04, value);
-
+
/* Set and enable acpibase */
pci_write_config32(dev, 0x40, ICH5_WDBASE | 1);
pci_write_config8(dev, 0x44, 0x10);
base = ICH5_WDBASE + 0x60;
-
+
/* Set bit 11 in TCO1_CNT */
value = inw(base + 0x08);
value |= 1 << 11;
outw(value, base + 0x08);
-
+
/* Clear TCO timeout status */
outw(0x0008, base + 0x04);
outw(0x0002, base + 0x06);
@@ -83,7 +83,7 @@ static void disable_jarell_frb3(void)
outl(value, base + 0x38);
value &= ~(1 << 16);
outl(value, base + 0x38);
-
+
}
static void disable_watchdogs(void)
@@ -114,12 +114,12 @@ static void ich5_watchdog_on(void)
value = pci_read_config16(dev, 0x04);
value |= (1 << 10);
pci_write_config16(dev, 0x04, value);
-
+
/* Set and enable acpibase */
pci_write_config32(dev, 0x40, ICH5_WDBASE | 1);
pci_write_config8(dev, 0x44, 0x10);
base = ICH5_WDBASE + 0x60;
-
+
/* Clear TCO timeout status */
outw(0x0008, base + 0x04);
outw(0x0002, base + 0x06);
@@ -132,7 +132,7 @@ static void ich5_watchdog_on(void)
/* clear bit 11 in TCO1_CNT to start watchdog */
value = inw(base + 0x08);
value &= ~(1 << 11);
- outw(value, base + 0x08);
+ outw(value, base + 0x08);
print_debug("Watchdog ICH5 enabled\n");
}