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authorStefan Reinauer <stepan@coresystems.de>2010-04-16 00:31:44 +0000
committerStefan Reinauer <stepan@openbios.org>2010-04-16 00:31:44 +0000
commitd6532116c94c705c7e94a34ab2f046e431fb3682 (patch)
tree6068b85e702f6eaf5b40fa273edfb9bfc4d155a1 /src/mainboard/intel/jarrell
parente46c1c85c90b6d263f951ab745a9fadd93041111 (diff)
downloadcoreboot-d6532116c94c705c7e94a34ab2f046e431fb3682.tar.xz
zero warnings days: unify mp tables. fix warnings.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5448 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/intel/jarrell')
-rw-r--r--src/mainboard/intel/jarrell/mptable.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/mainboard/intel/jarrell/mptable.c b/src/mainboard/intel/jarrell/mptable.c
index c75657982a..73aa575540 100644
--- a/src/mainboard/intel/jarrell/mptable.c
+++ b/src/mainboard/intel/jarrell/mptable.c
@@ -7,7 +7,7 @@
static void *smp_write_config_table(void *v)
{
static const char sig[4] = "PCMP";
- static const char oem[8] = "LNXI ";
+ static const char oem[8] = "COREBOOT";
static const char productid[12] = "SE7520JR20 ";
struct mp_config_table *mc;
unsigned char bus_num;
@@ -16,7 +16,7 @@ static void *smp_write_config_table(void *v)
unsigned char bus_pxhd_2;
unsigned char bus_pxhd_3 = 0;
unsigned char bus_pxhd_4 = 0;
- unsigned char bus_pxhd_x;
+ unsigned char bus_pxhd_x = 0;
unsigned char bus_ich5r_1;
unsigned int bus_pxhd_id;
@@ -137,6 +137,7 @@ static void *smp_write_config_table(void *v)
else {
printk(BIOS_DEBUG, "ERROR - could not find IOAPIC PCI 1:00.3\n");
}
+
/* pxhd apic 5 */
if(bus_pxhd_3) { /* Active riser pxhd */
dev = dev_find_slot(bus_pxhd_x, PCI_DEVFN(0x00,1));
@@ -164,7 +165,6 @@ static void *smp_write_config_table(void *v)
}
}
}
-
/* ISA backward compatibility interrupts */
smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
@@ -218,8 +218,8 @@ static void *smp_write_config_table(void *v)
smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
bus_isa, 0x00, MP_APIC_ALL, 0x01);
+ /* FIXME verify I have the irqs handled for all of the risers */
-#warning "FIXME verify I have the irqs handled for all of the risers"
/* 2:3.0 PCI Slot 1 */
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
bus_pxhd_1, (3<<2)|0, 0x9, 0x0);