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author | Aamir Bohra <aamir.bohra@intel.com> | 2020-03-25 15:31:12 +0530 |
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committer | Furquan Shaikh <furquan@google.com> | 2020-04-01 16:39:28 +0000 |
commit | a23e0c9d74b7f06738ebf28b068e1bd63f246982 (patch) | |
tree | 5afd6c3027ebca12e4d6f94b443fe42dd1f3b75e /src/mainboard/intel/jasperlake_rvp/dsdt.asl | |
parent | 51ce41c0e661fd9cb9207463bcbd920e55b44a62 (diff) | |
download | coreboot-a23e0c9d74b7f06738ebf28b068e1bd63f246982.tar.xz |
soc/intel/{tgl,jsl}: Use soc/intel/jasperlake for Jasper Lake SoC
Switch to using Jasper Lake SoC code from soc/intel/jasperlake and stop
referring from soc/intel/tigerlake.
Addtionally mainboard changes are done to support build.
BUG=b:150217037
TEST=Build and boot waddledoo. Build jasperlake_rvp and volteer board.
Change-Id: I39f117bd66cb610a305bcdb8ea65332fd0ff4814
Signed-off-by: Aamir Bohra <aamir.bohra@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39825
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Diffstat (limited to 'src/mainboard/intel/jasperlake_rvp/dsdt.asl')
-rw-r--r-- | src/mainboard/intel/jasperlake_rvp/dsdt.asl | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/intel/jasperlake_rvp/dsdt.asl b/src/mainboard/intel/jasperlake_rvp/dsdt.asl index c996717b0e..ed59af6a96 100644 --- a/src/mainboard/intel/jasperlake_rvp/dsdt.asl +++ b/src/mainboard/intel/jasperlake_rvp/dsdt.asl @@ -25,7 +25,7 @@ DefinitionBlock( 0x20110725 /* OEM revision */ ) { - #include <soc/intel/tigerlake/acpi/platform.asl> + #include <soc/intel/jasperlake/acpi/platform.asl> /* global NVS and variables */ #include <soc/intel/common/block/acpi/acpi/globalnvs.asl> @@ -37,7 +37,7 @@ DefinitionBlock( Device (PCI0) { #include <soc/intel/common/block/acpi/acpi/northbridge.asl> - #include <soc/intel/tigerlake/acpi/southbridge.asl> + #include <soc/intel/jasperlake/acpi/southbridge.asl> } } |