diff options
| author | Ronak Kanabar <ronak.kanabar@intel.com> | 2020-04-14 18:00:04 +0530 |
|---|---|---|
| committer | Subrata Banik <subrata.banik@intel.com> | 2020-04-28 09:40:21 +0000 |
| commit | d31c150f819f8cd9441cb4a104d91df8eef0294d (patch) | |
| tree | ac26cd429c730908b8fdcf8236b0fd8626a83266 /src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb | |
| parent | 979c8c7caefdb0a41d18ddd3f1e3473edf6b7861 (diff) | |
| download | coreboot-d31c150f819f8cd9441cb4a104d91df8eef0294d.tar.xz | |
mb/intel/jasperlake_rvp: Configure GPIO for JSLRVP
We need to configure GSPI related gpios for external EC and TPM.
Along with GSPI configuring gpios for LAN (power down), FSP_INT
and PCH_INT.
BUG=None
BRANCH=None
TEST=External EC card works and LAN is powered down.
Change-Id: I1f2d32537b56802d0631a94590a6ebe156c5cdd0
Signed-off-by: Ronak Kanabar <ronak.kanabar@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40362
Reviewed-by: Aamir Bohra <aamir.bohra@intel.com>
Reviewed-by: V Sowmya <v.sowmya@intel.com>
Reviewed-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb')
| -rw-r--r-- | src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb b/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb index 7dc45ae520..cb3d1f3598 100644 --- a/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb +++ b/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb @@ -9,7 +9,7 @@ chip soc/intel/jasperlake # route. i.e. If this route changes then the affected GPE # offset bits also need to be changed. register "pmc_gpe0_dw0" = "GPP_B" - register "pmc_gpe0_dw1" = "GPP_D" + register "pmc_gpe0_dw1" = "GPP_H" register "pmc_gpe0_dw2" = "GPP_E" # FSP configuration @@ -297,7 +297,7 @@ chip soc/intel/jasperlake chip drivers/spi/acpi register "hid" = "ACPI_DT_NAMESPACE_HID" register "compat_string" = ""google,cr50"" - register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_D16_IRQ)" + register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_H13_IRQ)" device spi 0 on end end end # GSPI #1 |