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| author | Barnali Sarkar <barnali.sarkar@intel.com> | 2016-11-29 16:51:08 +0530 |
|---|---|---|
| committer | Furquan Shaikh <furquan@google.com> | 2016-12-03 02:34:53 +0100 |
| commit | 2ed14f61d1a2976d0ebce59fcc67bd61fce4100d (patch) | |
| tree | 7f179c8e6c233e7771a6d721df1763cbdef12ead /src/mainboard/intel/kblrvp/Kconfig.name | |
| parent | d9e654321c5a063898f39aa64898fac26a6fd23f (diff) | |
| download | coreboot-2ed14f61d1a2976d0ebce59fcc67bd61fce4100d.tar.xz | |
mainboard/intel/kblrvp: Enabling Kaby Lake RVP7
Add support for Kaby Lake RVP7 board
* Add RVP7 board support in Kconfig
* Override default descriptor and ME binary paths in Kconfig
since those binaries will differ for RVP3 and RVP7
* Add RVP7 board name in board_info.txt and Kconfig.name
* Add devicetree.cb for RVP7 in the variants path
* Add gpio.h for RVP7 in variants/include/variant path
* Made board specific code for retrieving spd, i.e., in RVP7
there is non-soldered DIMMs, so SPD is read through smbus,
unlike RVP3 where memory DIMMs are soldered down with board.
Hence for RVP3, the spd binaries will be fixed and can be
kept as binary file in cbfs.
BUG=none
BRANCH=none
TEST=Built and boot Kaby Lake RVP7
Change-Id: I6f3d17d857bad1b5cf39f0bc900c760fee72da48
Signed-off-by: Barnali Sarkar <barnali.sarkar@intel.com>
Reviewed-on: https://review.coreboot.org/17637
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/mainboard/intel/kblrvp/Kconfig.name')
| -rw-r--r-- | src/mainboard/intel/kblrvp/Kconfig.name | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mainboard/intel/kblrvp/Kconfig.name b/src/mainboard/intel/kblrvp/Kconfig.name index 66ec552d9c..e697252a69 100644 --- a/src/mainboard/intel/kblrvp/Kconfig.name +++ b/src/mainboard/intel/kblrvp/Kconfig.name @@ -1,2 +1,4 @@ config BOARD_INTEL_KBLRVP3 bool "Kabylake LPDDR3 RVP3" +config BOARD_INTEL_KBLRVP7 + bool "Kabylake DDR3L RVP7" |