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| author | Naresh G Solanki <naresh.solanki@intel.com> | 2016-10-15 18:13:55 +0530 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-10-25 21:20:06 +0200 |
| commit | ab5d6902fdef7c7f26145619030a42aeda24b1ab (patch) | |
| tree | bbca364e427c4c60fbc91e5718b217d16af1edcb /src/mainboard/intel/kblrvp/Kconfig.name | |
| parent | 9369e10f1f4e9497a09eb7848d18d78b89593147 (diff) | |
| download | coreboot-ab5d6902fdef7c7f26145619030a42aeda24b1ab.tar.xz | |
mainboard/intel/kblrvp: Initial commit for Intel Kaby Lake RVP3
Add support for Kaby Lake RVP3.
Use kunimitsu at commit 028200f as base.
Kabylake RVP3 is based on Kabylake-Y with onboard Dual Channel
LPDDR3 DIMM.
* Update board name to kblrvp
* Remove fsp 1.1 specific code( As Kabylake uses fsp2.0)
* Remove board id function.
* Remove unused spd & add rvp3 spd file.
This is an initial commit does not have full support to boot.
Will add more CLs to boot Chrome OS with depthcharge.
Change-Id: Id8e32c5b93fc32ba84278c5c5da8f8e30c201bea
Signed-off-by: Naresh G Solanki <naresh.solanki@intel.com>
Reviewed-on: https://review.coreboot.org/17032
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/mainboard/intel/kblrvp/Kconfig.name')
| -rw-r--r-- | src/mainboard/intel/kblrvp/Kconfig.name | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mainboard/intel/kblrvp/Kconfig.name b/src/mainboard/intel/kblrvp/Kconfig.name new file mode 100644 index 0000000000..66ec552d9c --- /dev/null +++ b/src/mainboard/intel/kblrvp/Kconfig.name @@ -0,0 +1,2 @@ +config BOARD_INTEL_KBLRVP3 + bool "Kabylake LPDDR3 RVP3" |