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| author | Patrick Rudolph <patrick.rudolph@9elements.com> | 2018-03-05 09:53:47 +0100 |
|---|---|---|
| committer | David Hendricks <david.hendricks@gmail.com> | 2018-03-23 04:09:50 +0000 |
| commit | 57afc5e0f2309ba9f7fbd171642f04c6da9d9976 (patch) | |
| tree | aeeafda4fee623141e5a8c162f7612b6454918e7 /src/mainboard/intel/kblrvp/Kconfig | |
| parent | 3d9462a07f0250cf628b7874620f9f682b7a020e (diff) | |
| download | coreboot-57afc5e0f2309ba9f7fbd171642f04c6da9d9976.tar.xz | |
arch/arm64/armv8/mmu: Add support for 48bit VA
The VA space needs to be extended to support 48bit, as on Cavium SoCs
the MMIO starts at 1 << 47.
The following changes were done to coreboot and libpayload:
* Use page table lvl 0
* Increase VA bits to 48
* Enable 256TB in MMU controller
* Add additional asserts
Tested on Cavium SoC and two ARM64 Chromebooks.
Change-Id: I89e6a4809b6b725c3945bad7fce82b0dfee7c262
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/24970
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/mainboard/intel/kblrvp/Kconfig')
0 files changed, 0 insertions, 0 deletions