diff options
author | Praveen hodagatta pranesh <praveenx.hodagatta.pranesh@intel.com> | 2018-11-09 18:15:24 +0800 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2019-01-16 11:56:50 +0000 |
commit | d6e00546a4cdce308a6a5480887ac03d94c3b826 (patch) | |
tree | d1805ebc911ecd3a0880e55235dbe16bc0cb3cc4 /src/mainboard/intel/kblrvp/romstage.c | |
parent | 5c29daa150c5ba0a8acbdec90013f6526ac8d1f7 (diff) | |
download | coreboot-d6e00546a4cdce308a6a5480887ac03d94c3b826.tar.xz |
mb/intel/kblrvp: Add new Kaby lake RVP11 support
The RVP11 is a dual-channel DDR4 SO-DIMM on skylake H platform.
This patch add following chages
- Add overridetree.cb for RVP11
- Select skylake PCH-H chipset config for RVP11.
- Add GPIO table as per board schematics.
- Add audio verb table for RVP11.
- Set the UserBd UPD to BOARD_TYPE_DESKTOP.
BUG=None
TEST= Build and flash, confirm boot into yocto OS on KBL RVP11
platform. verified PCI, USB, ethernet, SATA, display,
audio and power functionalities.
Signed-off-by: Praveen hodagatta pranesh <praveenx.hodagatta.pranesh@intel.com>
Change-Id: Id86f56df06795601cc9d7830766e54396d218e00
Reviewed-on: https://review.coreboot.org/c/29809
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/intel/kblrvp/romstage.c')
-rw-r--r-- | src/mainboard/intel/kblrvp/romstage.c | 14 |
1 files changed, 9 insertions, 5 deletions
diff --git a/src/mainboard/intel/kblrvp/romstage.c b/src/mainboard/intel/kblrvp/romstage.c index 47f8249739..69c10bb9a0 100644 --- a/src/mainboard/intel/kblrvp/romstage.c +++ b/src/mainboard/intel/kblrvp/romstage.c @@ -1,7 +1,7 @@ /* * This file is part of the coreboot project. * - * Copyright (C) 2016 Intel Corporation. + * Copyright (C) 2016-2018 Intel Corporation. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -61,13 +61,17 @@ void mainboard_memory_init_params(FSPM_UPD *mupd) mem_cfg->MemorySpdDataLen = blk.len; mem_cfg->MemorySpdPtr00 = (uintptr_t)blk.spd_array[0]; mem_cfg->MemorySpdPtr10 = (uintptr_t)blk.spd_array[2]; - if (IS_ENABLED(CONFIG_BOARD_INTEL_KBLRVP8)) { + + switch (get_board_id()) { + case BOARD_ID_KBL_RVP8: + case BOARD_ID_KBL_RVP11: mem_cfg->MemorySpdPtr01 = (uintptr_t)blk.spd_array[1]; mem_cfg->MemorySpdPtr11 = (uintptr_t)blk.spd_array[3]; + mem_cfg->UserBd = BOARD_TYPE_DESKTOP; + break; + default: + break; } - } mupd->FspmTestConfig.DmiVc1 = 1; - if (IS_ENABLED(CONFIG_BOARD_INTEL_KBLRVP8)) - mem_cfg->UserBd = BOARD_TYPE_DESKTOP; } |