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authorAaron Durbin <adurbin@chromium.org>2017-05-25 09:36:06 -0500
committerMartin Roth <martinroth@google.com>2017-05-27 16:57:18 +0200
commitdd82edc388fe070fe35f862cf6ceeb86a62e1259 (patch)
tree601d7c27a8cd4c8b2101016fbb3dd7502c833153 /src/mainboard/intel/kblrvp
parentc96f757af1e7f2cbeec5f7b215b561e638ec74e3 (diff)
downloadcoreboot-dd82edc388fe070fe35f862cf6ceeb86a62e1259.tar.xz
lib/spd_bin: make SMBus SPD addresses an input
Instead of assuming the mapping of dimm number to SPD SMBus address, allow the mainboard to provide its own mapping. That way, global resources of empty SPD contents aren't wasted in order to address a dimm on a mainboard that doesn't meet the current assumption. Change-Id: Id0e79231dc2303373badaae003038a1ac06a5635 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/19915 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Naresh Solanki <naresh.solanki@intel.com>
Diffstat (limited to 'src/mainboard/intel/kblrvp')
-rw-r--r--src/mainboard/intel/kblrvp/romstage.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/src/mainboard/intel/kblrvp/romstage.c b/src/mainboard/intel/kblrvp/romstage.c
index a3b1ba1f91..9082254385 100644
--- a/src/mainboard/intel/kblrvp/romstage.c
+++ b/src/mainboard/intel/kblrvp/romstage.c
@@ -50,7 +50,9 @@ void mainboard_memory_init_params(FSPM_UPD *mupd)
/* Memory leak is ok since we have memory mapped boot media */
mem_cfg->MemorySpdPtr00 = (uintptr_t)rdev_mmap_full(&spd_rdev);
} else { /* for CONFIG_BOARD_INTEL_KBLRVP7 */
- struct spd_block blk;
+ struct spd_block blk = {
+ .addr_map = { 0xa0, 0xa2, 0xa4, 0xa6, },
+ };
mem_cfg->DqPinsInterleaved = 1;
get_spd_smbus(&blk);