diff options
author | Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com> | 2020-05-10 01:24:11 +0530 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2020-05-18 07:13:23 +0000 |
commit | 97c5464443306f26b61cec3a0f50108a5c06b7ef (patch) | |
tree | f085457907ad200a0d9d9be8a07c937e755fae91 /src/mainboard/intel/kblrvp | |
parent | 19c2ce7639d55908d210782ae5a0315396cc7eaf (diff) | |
download | coreboot-97c5464443306f26b61cec3a0f50108a5c06b7ef.tar.xz |
skylake: update processor power limits configuration
Update processor power limit configuration parameters based on
common code base support for Intel Skylake SoC based platforms.
BRANCH=None
BUG=None
TEST=Built and tested on nami system
Change-Id: Idc82f3d2f805b92fb3005d2f49098e55cb142e45
Signed-off-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41238
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/mainboard/intel/kblrvp')
-rw-r--r-- | src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb | 4 | ||||
-rw-r--r-- | src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb | 4 |
2 files changed, 6 insertions, 2 deletions
diff --git a/src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb b/src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb index 436a4ed7d4..fa502834af 100644 --- a/src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb +++ b/src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb @@ -111,7 +111,9 @@ chip soc/intel/skylake }" # PL2 override 60W - register "tdp_pl2_override" = "60" + register "power_limits_config" = "{ + .tdp_pl2_override = 60, + }" # Power Limit Related register "PowerLimit4" = "0" diff --git a/src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb b/src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb index 46d7929d21..91abfe6f03 100644 --- a/src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb +++ b/src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb @@ -156,7 +156,9 @@ chip soc/intel/skylake }" # PL2 override 25W - register "tdp_pl2_override" = "25" + register "power_limits_config" = "{ + .tdp_pl2_override = 25, + }" # Use default SD card detect GPIO configuration #register "sdcard_cd_gpio_default" = "GPP_D10" |