coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)

This patch is a raw application of

 find src/ -type f | xargs sed -i -e 's/IS_ENABLED\s*(CONFIG_/CONFIG(/g'

Change-Id: I6262d6d5c23cabe23c242b4f38d446b74fe16b88
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31774
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>

9 files changed, 15 insertions, 15 deletions

diff --git a/src/mainboard/intel/kblrvp/acpi/ec.asl b/src/mainboard/intel/kblrvp/acpi/ec.asl
index a9a61ddc2c..efed4de820 100644
--- a/src/mainboard/intel/kblrvp/acpi/ec.asl
+++ b/src/mainboard/intel/kblrvp/acpi/ec.asl
@@ -22,7 +22,7 @@
 
 /* Enable EC backed PD MCU device in ACPI */
 #define EC_ENABLE_PD_MCU_DEVICE
-#if IS_ENABLED(CONFIG_EC_GOOGLE_CHROMEEC)
+#if CONFIG(EC_GOOGLE_CHROMEEC)
 
 /* Enable LID switch and provide wake pin for EC */
 #define EC_ENABLE_LID_SWITCH
diff --git a/src/mainboard/intel/kblrvp/acpi/mainboard.asl b/src/mainboard/intel/kblrvp/acpi/mainboard.asl
index 544d695811..531cd21336 100644
--- a/src/mainboard/intel/kblrvp/acpi/mainboard.asl
+++ b/src/mainboard/intel/kblrvp/acpi/mainboard.asl
@@ -14,7 +14,7 @@
  * GNU General Public License for more details.
  */
 
-#if IS_ENABLED(CONFIG_EC_GOOGLE_CHROMEEC)
+#if CONFIG(EC_GOOGLE_CHROMEEC)
 Scope (\_SB)
 {
 	Device (PWRB)
diff --git a/src/mainboard/intel/kblrvp/chromeos.c b/src/mainboard/intel/kblrvp/chromeos.c
index d48c9c238b..101b04be74 100644
--- a/src/mainboard/intel/kblrvp/chromeos.c
+++ b/src/mainboard/intel/kblrvp/chromeos.c
@@ -43,7 +43,7 @@ void fill_lb_gpios(struct lb_gpios *gpios)
 
 int get_lid_switch(void)
 {
-	if (IS_ENABLED(CONFIG_EC_GOOGLE_CHROMEEC))
+	if (CONFIG(EC_GOOGLE_CHROMEEC))
 		/* Read lid switch state from the EC. */
 		return !!(google_chromeec_get_switches() & EC_SWITCH_LID_OPEN);
 
@@ -53,7 +53,7 @@ int get_lid_switch(void)
 
 int get_recovery_mode_switch(void)
 {
-	if (IS_ENABLED(CONFIG_EC_GOOGLE_CHROMEEC)) {
+	if (CONFIG(EC_GOOGLE_CHROMEEC)) {
 		/* Check for dedicated recovery switch first. */
 		if (google_chromeec_get_switches() &
 			EC_SWITCH_DEDICATED_RECOVERY)
@@ -70,7 +70,7 @@ int get_recovery_mode_switch(void)
 
 int clear_recovery_mode_switch(void)
 {
-	if (IS_ENABLED(CONFIG_EC_GOOGLE_CHROMEEC))
+	if (CONFIG(EC_GOOGLE_CHROMEEC))
 		/* Clear keyboard recovery event. */
 		return google_chromeec_clear_events_b(
 			EC_HOST_EVENT_MASK(EC_HOST_EVENT_KEYBOARD_RECOVERY));
diff --git a/src/mainboard/intel/kblrvp/dsdt.asl b/src/mainboard/intel/kblrvp/dsdt.asl
index ddb69da97d..8a165518b7 100644
--- a/src/mainboard/intel/kblrvp/dsdt.asl
+++ b/src/mainboard/intel/kblrvp/dsdt.asl
@@ -51,7 +51,7 @@ DefinitionBlock(
 	#include "acpi/ipu_mainboard.asl"
 	#include "acpi/mipi_camera.asl"
 
-#if IS_ENABLED(CONFIG_CHROMEOS)
+#if CONFIG(CHROMEOS)
 	// Chrome OS specific
 	#include <vendorcode/google/chromeos/acpi/chromeos.asl>
 #endif
diff --git a/src/mainboard/intel/kblrvp/hda_verb.c b/src/mainboard/intel/kblrvp/hda_verb.c
index bbe0af027b..fdd196dc88 100644
--- a/src/mainboard/intel/kblrvp/hda_verb.c
+++ b/src/mainboard/intel/kblrvp/hda_verb.c
@@ -14,6 +14,6 @@
  * GNU General Public License for more details.
  */
 
-#if !IS_ENABLED(CONFIG_BOARD_INTEL_KBLRVP8)
+#if !CONFIG(BOARD_INTEL_KBLRVP8)
 #include "variant/hda_verb.h"
 #endif
diff --git a/src/mainboard/intel/kblrvp/mainboard.c b/src/mainboard/intel/kblrvp/mainboard.c
index 38279c3313..604c069d77 100644
--- a/src/mainboard/intel/kblrvp/mainboard.c
+++ b/src/mainboard/intel/kblrvp/mainboard.c
@@ -27,7 +27,7 @@
 
 static void mainboard_init(struct device *dev)
 {
-	if (IS_ENABLED(CONFIG_EC_GOOGLE_CHROMEEC))
+	if (CONFIG(EC_GOOGLE_CHROMEEC))
 		mainboard_ec_init();
 }
 
diff --git a/src/mainboard/intel/kblrvp/ramstage.c b/src/mainboard/intel/kblrvp/ramstage.c
index 0b52f377be..ad55c2675a 100644
--- a/src/mainboard/intel/kblrvp/ramstage.c
+++ b/src/mainboard/intel/kblrvp/ramstage.c
@@ -32,7 +32,7 @@ void mainboard_silicon_init_params(FSP_SIL_UPD *params)
 
 static void ioexpander_init(void *unused)
 {
-	if (IS_ENABLED(CONFIG_BOARD_INTEL_KBLRVP11))
+	if (CONFIG(BOARD_INTEL_KBLRVP11))
 		return;
 
 	printk(BIOS_DEBUG, "Programming TCA6424A I/O expander\n");
diff --git a/src/mainboard/intel/kblrvp/romstage.c b/src/mainboard/intel/kblrvp/romstage.c
index 8e5ffcf955..c96f791516 100644
--- a/src/mainboard/intel/kblrvp/romstage.c
+++ b/src/mainboard/intel/kblrvp/romstage.c
@@ -42,7 +42,7 @@ void mainboard_memory_init_params(FSPM_UPD *mupd)
 	mainboard_fill_rcomp_res_data(&mem_cfg->RcompResistor);
 	mainboard_fill_rcomp_strength_data(&mem_cfg->RcompTarget);
 
-	if (IS_ENABLED(CONFIG_BOARD_INTEL_KBLRVP3)) {
+	if (CONFIG(BOARD_INTEL_KBLRVP3)) {
 		struct region_device spd_rdev;
 
 		mem_cfg->DqPinsInterleaved = 0;
diff --git a/src/mainboard/intel/kblrvp/smihandler.c b/src/mainboard/intel/kblrvp/smihandler.c
index bb09d78da2..ba8458be15 100644
--- a/src/mainboard/intel/kblrvp/smihandler.c
+++ b/src/mainboard/intel/kblrvp/smihandler.c
@@ -47,25 +47,25 @@ int mainboard_io_trap_handler(int smif)
 
 void mainboard_smi_gpi_handler(const struct gpi_status *sts)
 {
-	if (IS_ENABLED(CONFIG_BOARD_INTEL_KBLRVP8))
+	if (CONFIG(BOARD_INTEL_KBLRVP8))
 		return;
 
-	if (IS_ENABLED(CONFIG_EC_GOOGLE_CHROMEEC))
+	if (CONFIG(EC_GOOGLE_CHROMEEC))
 		if (gpi_status_get(sts, EC_SMI_GPI))
 			chromeec_smi_process_events();
 }
 
 void mainboard_smi_sleep(u8 slp_typ)
 {
-	if (IS_ENABLED(CONFIG_EC_GOOGLE_CHROMEEC))
-		if (IS_ENABLED(CONFIG_EC_GOOGLE_CHROMEEC))
+	if (CONFIG(EC_GOOGLE_CHROMEEC))
+		if (CONFIG(EC_GOOGLE_CHROMEEC))
 			chromeec_smi_sleep(slp_typ, MAINBOARD_EC_S3_WAKE_EVENTS,
 					MAINBOARD_EC_S5_WAKE_EVENTS);
 }
 
 int mainboard_smi_apmc(u8 apmc)
 {
-	if (IS_ENABLED(CONFIG_EC_GOOGLE_CHROMEEC))
+	if (CONFIG(EC_GOOGLE_CHROMEEC))
 		chromeec_smi_apmc(apmc, MAINBOARD_EC_SCI_EVENTS,
 					MAINBOARD_EC_SMI_EVENTS);
 	return 0;