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authorFurquan Shaikh <furquan@chromium.org>2016-11-15 20:33:29 -0800
committerFurquan Shaikh <furquan@google.com>2016-11-18 04:01:59 +0100
commitcd2afc0df034670a83479aded514b22b99124cf5 (patch)
tree185aa9e1d8dd811a93b90682e250b95bf4ae8cee /src/mainboard/intel/kunimitsu/chromeos.c
parentf8a274acf53217129460b5a487396761c174bd54 (diff)
downloadcoreboot-cd2afc0df034670a83479aded514b22b99124cf5.tar.xz
google/chromeec: Add common infrastructure for boot-mode switches
Instead of defining the same functions for reading/clearing boot-mode switches from EC in every mainboard, add a common infrastructure to enable common functions for handling boot-mode switches if GOOGLE_CHROMEEC is being used. Only boards that were not moved to this new infrastructure are those that do not use GOOGLE_CHROMEEC or which rely on some mainboard specific mechanism for reading boot-mode switches. BUG=None BRANCH=None TEST=abuild compiles all boards successfully with and without ChromeOS option. Change-Id: I267aadea9e616464563df04b51a668b877f0d578 Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://review.coreboot.org/17449 Tested-by: build bot (Jenkins) Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/mainboard/intel/kunimitsu/chromeos.c')
-rw-r--r--src/mainboard/intel/kunimitsu/chromeos.c36
1 files changed, 0 insertions, 36 deletions
diff --git a/src/mainboard/intel/kunimitsu/chromeos.c b/src/mainboard/intel/kunimitsu/chromeos.c
index daa85c69e0..42763a7d34 100644
--- a/src/mainboard/intel/kunimitsu/chromeos.c
+++ b/src/mainboard/intel/kunimitsu/chromeos.c
@@ -14,19 +14,13 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
-#include <console/console.h>
-#include <device/device.h>
-#include <device/pci.h>
#include <rules.h>
#include <gpio.h>
#include <soc/gpio.h>
#include <string.h>
-#include <ec/google/chromeec/ec.h>
#include <vendorcode/google/chromeos/chromeos.h>
#include "gpio.h"
-#include "ec.h"
#if ENV_RAMSTAGE
#include <boot/coreboot_tables.h>
@@ -47,36 +41,6 @@ void fill_lb_gpios(struct lb_gpios *gpios)
}
#endif /* ENV_RAMSTAGE */
-int get_lid_switch(void)
-{
- /* Read lid switch state from the EC. */
- return !!(google_chromeec_get_switches() & EC_SWITCH_LID_OPEN);
-}
-
-int get_developer_mode_switch(void)
-{
- /* No physical developer mode switch. */
- return 0;
-}
-
-int get_recovery_mode_switch(void)
-{
- /* Check for dedicated recovery switch first. */
- if (google_chromeec_get_switches() & EC_SWITCH_DEDICATED_RECOVERY)
- return 1;
-
- /* Otherwise check if the EC has posted the keyboard recovery event. */
- return !!(google_chromeec_get_events_b() &
- EC_HOST_EVENT_MASK(EC_HOST_EVENT_KEYBOARD_RECOVERY));
-}
-
-int clear_recovery_mode_switch(void)
-{
- /* Clear keyboard recovery event. */
- return google_chromeec_clear_events_b(
- EC_HOST_EVENT_MASK(EC_HOST_EVENT_KEYBOARD_RECOVERY));
-}
-
int get_write_protect_state(void)
{
/* Read PCH_WP GPIO. */