diff options
author | Andrey Petrov <andrey.petrov@intel.com> | 2017-02-23 14:10:11 -0800 |
---|---|---|
committer | Andrey Petrov <andrey.petrov@intel.com> | 2017-02-25 09:00:50 +0100 |
commit | 6a489237d5686828f26d7e452824374df7fb5708 (patch) | |
tree | ca24b0c87fd7c18869cf4d1299e835b35bba998b /src/mainboard/intel/leafhill/brd_gpio.h | |
parent | 37e30aa624e959bcc5b3a3a2ed1d1337c32afff4 (diff) | |
download | coreboot-6a489237d5686828f26d7e452824374df7fb5708.tar.xz |
mainboard/intel/leafhill: Clean up
This patch tries to clean the code by:
o removing duplication of LPC GPIO pads
o removing incorrect definitions from devicetree
o removing irrelevant entries from FMD file
Also adds vital defaults in Kconfig so it is possible to build an image.
Change-Id: Id9913f3b053189166392271152ce5300d82a7de8
Signed-off-by: Andrey Petrov <andrey.petrov@intel.com>
Reviewed-on: https://review.coreboot.org/18479
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/mainboard/intel/leafhill/brd_gpio.h')
-rw-r--r-- | src/mainboard/intel/leafhill/brd_gpio.h | 15 |
1 files changed, 1 insertions, 14 deletions
diff --git a/src/mainboard/intel/leafhill/brd_gpio.h b/src/mainboard/intel/leafhill/brd_gpio.h index 33b839bbca..18d130b450 100644 --- a/src/mainboard/intel/leafhill/brd_gpio.h +++ b/src/mainboard/intel/leafhill/brd_gpio.h @@ -1,7 +1,7 @@ /* * This file is part of the coreboot project. * - * Copyright (C) 2015-2016 Intel Corporation. All Rights Reserved. + * Copyright (C) 2017 Intel Corporation. All Rights Reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -15,8 +15,6 @@ #include <soc/gpio.h> -#if ENV_ROMSTAGE - static const struct pad_config gpio_table[] = { PAD_CFG_NF(GPIO_134, NATIVE, DEEP, NF2), /* ISH_I2C0_SDA/IO-OD */ PAD_CFG_NF(GPIO_135, NATIVE, DEEP, NF2), /* ISH_I2C0_SCL/IO-OD */ @@ -48,15 +46,4 @@ static const struct pad_config gpio_table[] = { PAD_CFG_NF(SMB_CLK, NATIVE, DEEP, NF1), PAD_CFG_NF(SMB_DATA, NATIVE, DEEP, NF1), - PAD_CFG_NF(LPC_ILB_SERIRQ, NATIVE, DEEP, NF1), - PAD_CFG_NF(LPC_CLKOUT0, NATIVE, DEEP, NF1), - PAD_CFG_NF(LPC_CLKOUT1, NATIVE, DEEP, NF1), - PAD_CFG_NF(LPC_AD0, NATIVE, DEEP, NF1), - PAD_CFG_NF(LPC_AD1, NATIVE, DEEP, NF1), - PAD_CFG_NF(LPC_AD2, NATIVE, DEEP, NF1), - PAD_CFG_NF(LPC_AD3, NATIVE, DEEP, NF1), - PAD_CFG_NF(LPC_CLKRUNB, NATIVE, DEEP, NF1), - PAD_CFG_NF(LPC_FRAMEB, NATIVE, DEEP, NF1), }; - -#endif |