diff options
author | Brenton Dong <brenton.m.dong@intel.com> | 2017-02-15 16:13:27 -0700 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2017-02-22 23:22:13 +0100 |
commit | 6530b6d30dd5197ea855c608cecbcdcea8df9e32 (patch) | |
tree | 9268f38efee623b203723ec971b0ecb2b09972f8 /src/mainboard/intel/minnow3/Makefile.inc | |
parent | 97f542efc285a4a2d7245f75cd5f871f5f60b890 (diff) | |
download | coreboot-6530b6d30dd5197ea855c608cecbcdcea8df9e32.tar.xz |
intel/minnow3: Implement and configure GPIO tables
Copy GPIO table implementation from the google/reef board except
with board variant features removed. Also exlcude CrOS GPIO functions.
Remove previous romstage GPIO implementation in brd_gpio.h and romstage.c.
Configure GPIO settings for MinnowBoard 3.
Change-Id: Id2817dcf2f8f196ecd13c810f7f0010a115db566
Signed-off-by: Brenton Dong <brenton.m.dong@intel.com>
Reviewed-on: https://review.coreboot.org/18375
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/mainboard/intel/minnow3/Makefile.inc')
-rw-r--r-- | src/mainboard/intel/minnow3/Makefile.inc | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mainboard/intel/minnow3/Makefile.inc b/src/mainboard/intel/minnow3/Makefile.inc index 9e3e892f66..8d81a764f4 100644 --- a/src/mainboard/intel/minnow3/Makefile.inc +++ b/src/mainboard/intel/minnow3/Makefile.inc @@ -1,3 +1,5 @@ bootblock-y += bootblock.c +bootblock-y += gpio.c ramstage-y += mainboard.c +ramstage-y += gpio.c
\ No newline at end of file |